2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 * Copyright (C) 2008-2010 coresystems GmbH
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <console/console.h>
22 #include <device/device.h>
23 #include <device/pci.h>
24 #include <device/pci_ids.h>
25 #include <device/pci_ops.h>
30 #define HDA_ICII_REG 0x68
31 #define HDA_ICII_BUSY (1 << 0)
32 #define HDA_ICII_VALID (1 << 1)
34 static int set_bits(u32 port, u32 mask, u32 val)
39 /* Write (val & mask) to port. */
46 /* Wait for readback of register to match what was written to it. */
49 /* Wait 1ms based on BKDG wait time. */
53 } while ((reg32 != val) && --count);
55 /* Timeout occurred. */
61 static int codec_detect(u32 base)
65 /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0]. */
66 if (set_bits(base + 0x08, 1, 0) == -1)
69 /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0]. */
70 if (set_bits(base + 0x08, 1, 1) == -1)
73 /* Read in codec location (BAR + 0xe)[2..0]. */
74 reg32 = read32(base + 0xe);
82 /* Codec not found. */
83 /* Put HDA back in reset (BAR + 0x8)[0]. */
84 set_bits(base + 0x08, 1, 0);
85 printk(BIOS_DEBUG, "Azalia: No codec!\n");
89 u32 *cim_verb_data = NULL;
90 u32 cim_verb_data_size = 0;
92 static u32 find_verb(struct device *dev, u32 viddid, u32 **verb)
96 while (idx < (cim_verb_data_size / sizeof(u32))) {
97 u32 verb_size = 4 * cim_verb_data[idx + 2]; /* in u32 */
98 if (cim_verb_data[idx] != viddid) {
99 idx += verb_size + 3; /* Skip verb + header. */
102 *verb = &cim_verb_data[idx + 3];
106 /* Not all codecs need to load another verb. */
111 * Wait 50usec for the codec to indicate it is ready.
112 * No response would imply that the codec is non-operative.
114 static int wait_for_ready(u32 base)
116 /* Use a 50 usec timeout - the Linux kernel uses the same duration. */
120 u32 reg32 = read32(base + HDA_ICII_REG);
121 if (!(reg32 & HDA_ICII_BUSY))
130 * Wait 50usec for the codec to indicate that it accepted the previous command.
131 * No response would imply that the code is non-operative.
133 static int wait_for_valid(u32 base)
137 /* Send the verb to the codec. */
138 reg32 = read32(base + 0x68);
139 reg32 |= (1 << 0) | (1 << 1);
140 write32(base + 0x68, reg32);
142 /* Use a 50 usec timeout - the Linux kernel uses the same duration. */
145 reg32 = read32(base + HDA_ICII_REG);
146 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
155 static void codec_init(struct device *dev, u32 base, int addr)
157 u32 reg32, verb_size;
161 printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
164 if (wait_for_ready(base) == -1)
167 reg32 = (addr << 28) | 0x000f0000;
168 write32(base + 0x60, reg32);
170 if (wait_for_valid(base) == -1)
173 reg32 = read32(base + 0x64);
176 printk(BIOS_DEBUG, "Azalia: codec viddid: %08x\n", reg32);
177 verb_size = find_verb(dev, reg32, &verb);
180 printk(BIOS_DEBUG, "Azalia: No verb!\n");
183 printk(BIOS_DEBUG, "Azalia: verb_size: %d\n", verb_size);
186 for (i = 0; i < verb_size; i++) {
187 if (wait_for_ready(base) == -1)
190 write32(base + 0x60, verb[i]);
192 if (wait_for_valid(base) == -1)
195 printk(BIOS_DEBUG, "Azalia: verb loaded.\n");
198 static void codecs_init(struct device *dev, u32 base, u32 codec_mask)
201 for (i = 2; i >= 0; i--) {
202 if (codec_mask & (1 << i))
203 codec_init(dev, base, i);
207 static void azalia_init(struct device *dev)
209 u32 base, codec_mask, reg32;
210 struct resource *res;
213 /* Set bus master. */
214 reg32 = pci_read_config32(dev, PCI_COMMAND);
215 pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
217 pci_write_config8(dev, 0x3c, 0x0a); // TODO: Unused?
219 reg8 = pci_read_config8(dev, 0x40);
220 reg8 |= (1 << 3); /* Clear Clock Detect bit. */
221 pci_write_config8(dev, 0x40, reg8);
222 reg8 &= ~(1 << 3); /* Keep CLKDETCLR from clearing the bit over and over. */
223 pci_write_config8(dev, 0x40, reg8);
224 reg8 |= (1 << 2); /* Enable clock detection. */
225 pci_write_config8(dev, 0x40, reg8);
227 reg8 = pci_read_config8(dev, 0x40);
228 printk(BIOS_DEBUG, "Azalia: codec type: %s\n",
229 (reg8 & (1 << 1)) ? "Azalia" : "AC97");
231 reg8 = pci_read_config8(dev, 0x40); /* Audio control */
232 reg8 |= 1; /* Select Azalia mode. TODO: Control via devicetree.cb. */
233 pci_write_config8(dev, 0x40, reg8);
235 reg8 = pci_read_config8(dev, 0x4d); /* Docking status. */
236 reg8 &= ~(1 << 7); /* Docking not supported. */
237 pci_write_config8(dev, 0x4d, reg8);
239 res = find_resource(dev, 0x10);
244 * NOTE: This will break as soon as the Azalia gets a BAR above
245 * 4G. Is there anything we can do about it?
247 base = (u32)res->base;
248 printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
249 codec_mask = codec_detect(base);
252 printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask);
253 codecs_init(dev, base, codec_mask);
257 static void azalia_set_subsystem(device_t dev, unsigned vendor, unsigned device)
259 if (!vendor || !device) {
260 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
261 pci_read_config32(dev, PCI_VENDOR_ID));
263 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
264 ((device & 0xffff) << 16) | (vendor & 0xffff));
268 static struct pci_operations azalia_pci_ops = {
269 .set_subsystem = azalia_set_subsystem,
272 static struct device_operations azalia_ops = {
273 .read_resources = pci_dev_read_resources,
274 .set_resources = pci_dev_set_resources,
275 .enable_resources = pci_dev_enable_resources,
278 // .enable = mcp55_enable,
279 .ops_pci = &azalia_pci_ops,
282 static const struct pci_driver azalia __pci_driver = {
284 .vendor = PCI_VENDOR_ID_NVIDIA,
285 .device = PCI_DEVICE_ID_NVIDIA_MCP55_AZA,