2 * Copyright 2004 Tyan Computer
6 #include <console/console.h>
10 #include <device/device.h>
11 #include <device/pci.h>
12 #include <device/pci_ids.h>
13 #include <device/pci_ops.h>
16 static uint32_t final_reg;
18 static device_t find_lpc_dev( device_t dev, unsigned devfn)
23 lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
25 if ( !lpc_dev ) return lpc_dev;
27 if ((lpc_dev->vendor != PCI_VENDOR_ID_NVIDIA) || (
28 (lpc_dev->device != PCI_DEVICE_ID_NVIDIA_CK804_LPC) &&
29 (lpc_dev->device != PCI_DEVICE_ID_NVIDIA_CK804_PRO) &&
30 (lpc_dev->device != PCI_DEVICE_ID_NVIDIA_CK804_SLAVE)) ) {
32 id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
33 if ( (id != (PCI_VENDOR_ID_NVIDIA | (PCI_DEVICE_ID_NVIDIA_CK804_LPC << 16))) &&
34 (id != (PCI_VENDOR_ID_NVIDIA | (PCI_DEVICE_ID_NVIDIA_CK804_PRO << 16))) &&
35 (id != (PCI_VENDOR_ID_NVIDIA | (PCI_DEVICE_ID_NVIDIA_CK804_SLAVE << 16)))
44 void ck804_enable(device_t dev)
49 uint32_t reg_old, reg;
54 struct southbridge_nvidia_ck804_config *conf;
55 conf = dev->chip_info;
59 if(dev->device==0x0000) {
60 vendorid = pci_read_config32(dev, PCI_VENDOR_ID);
61 deviceid = (vendorid>>16) & 0xffff;
62 // vendorid &= 0xffff;
64 // vendorid = dev->vendor;
65 deviceid = dev->device;
68 devfn = (dev->path.u.pci.devfn) & ~7;
70 case PCI_DEVICE_ID_NVIDIA_CK804_SM:
73 case PCI_DEVICE_ID_NVIDIA_CK804_USB:
77 case PCI_DEVICE_ID_NVIDIA_CK804_USB2:
81 case PCI_DEVICE_ID_NVIDIA_CK804_NIC:
84 dev->rom_address = conf->nic_rom_address;
86 case PCI_DEVICE_ID_NVIDIA_CK804_NIC_BRIDGE:
89 dev->rom_address = conf->nic_rom_address;
91 case PCI_DEVICE_ID_NVIDIA_CK804_ACI:
95 case PCI_DEVICE_ID_NVIDIA_CK804_MCI:
99 case PCI_DEVICE_ID_NVIDIA_CK804_IDE:
102 dev->rom_address = conf->raid_rom_address;
104 case PCI_DEVICE_ID_NVIDIA_CK804_SATA0:
108 case PCI_DEVICE_ID_NVIDIA_CK804_SATA1:
112 case PCI_DEVICE_ID_NVIDIA_CK804_PCI:
116 case PCI_DEVICE_ID_NVIDIA_CK804_PCI_E:
127 lpc_dev = find_lpc_dev(dev, devfn - (i<<3));
128 if(!lpc_dev) continue;
134 reg_old = reg = pci_read_config32(lpc_dev, 0xe4);
140 if (reg != reg_old) {
141 pci_write_config32(lpc_dev, 0xe4, reg);
150 lpc_dev = find_lpc_dev(dev, devfn);
152 if ( !lpc_dev ) return;
156 final_reg = pci_read_config32(lpc_dev, 0xe8);
157 final_reg &= ~((1<<16)|(1<<8)|(1<<20)|(1<<10)|(1<<12)|(1<<13)|(1<<14)|(1<<22)|(1<<18)|(1<<15));
158 pci_write_config32(lpc_dev, 0xe8, final_reg);
160 reg_old = reg = pci_read_config32(lpc_dev, 0xe4);
162 if (reg != reg_old) {
163 pci_write_config32(lpc_dev, 0xe4, reg);
166 byte = pci_read_config8(lpc_dev, 0x74);
168 pci_write_config8(dev, 0x74, byte);
170 byte = pci_read_config8(lpc_dev, 0xdd);
171 byte |= ((1<<0)|(1<<3));
172 pci_write_config8(dev, 0xdd, byte);
179 final_reg |= (1 << index);
183 reg_old = pci_read_config32(lpc_dev, 0xe8);
184 if (final_reg != reg_old) {
185 pci_write_config32(lpc_dev, 0xe8, final_reg);
192 struct chip_operations southbridge_nvidia_ck804_ops = {
193 CHIP_NAME("NVIDIA CK804 Southbridge")
194 .enable_dev = ck804_enable,