Ever wondered where those "setting incorrect section attributes for
[coreboot.git] / src / southbridge / intel / i82801xx / i82801xx_usb_ehci.c
1 /*
2  * This file is part of the LinuxBIOS project.
3  *
4  * Copyright (C) 2005 Tyan Computer
5  * (Written by Yinghai Lu <yinghailu@gmail.com> for Tyan Computer>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
20  */
21
22 #include <console/console.h>
23 #include <device/device.h>
24 #include <device/pci.h>
25 #include <device/pci_ids.h>
26 #include <device/pci_ops.h>
27 #include "i82801xx.h"
28
29 static void usb_ehci_init(struct device *dev)
30 {
31         /* TODO: Is any special init really needed? */
32         uint32_t cmd;
33
34         printk_debug("EHCI: Setting up controller.. ");
35         cmd = pci_read_config32(dev, PCI_COMMAND);
36         pci_write_config32(dev, PCI_COMMAND, cmd | PCI_COMMAND_MASTER);
37
38         printk_debug("done.\n");
39 }
40
41 static void usb_ehci_set_subsystem(device_t dev, unsigned vendor,
42                                    unsigned device)
43 {
44         uint8_t access_cntl;
45
46         access_cntl = pci_read_config8(dev, 0x80);
47
48         /* Enable writes to protected registers. */
49         pci_write_config8(dev, 0x80, access_cntl | 1);
50
51         /* Write the subsystem vendor and device ID. */
52         pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
53                            ((device & 0xffff) << 16) | (vendor & 0xffff));
54
55         /* Restore protection. */
56         pci_write_config8(dev, 0x80, access_cntl);
57 }
58
59 static struct pci_operations lops_pci = {
60         .set_subsystem  = &usb_ehci_set_subsystem,
61 };
62
63 static struct device_operations usb_ehci_ops = {
64         .read_resources         = pci_dev_read_resources,
65         .set_resources          = pci_dev_set_resources,
66         .enable_resources       = pci_dev_enable_resources,
67         .init                   = usb_ehci_init,
68         .scan_bus               = 0,
69         .enable                 = i82801xx_enable,
70         .ops_pci                = &lops_pci,
71 };
72
73 /* 82801DB and 82801DBM */
74 static const struct pci_driver i82801db_usb_ehci __pci_driver = {
75         .ops    = &usb_ehci_ops,
76         .vendor = PCI_VENDOR_ID_INTEL,
77         .device = 0x24cd,
78 };
79
80 /* 82801EB and 82801ER */
81 static const struct pci_driver i82801ex_usb_ehci __pci_driver = {
82         .ops    = &usb_ehci_ops,
83         .vendor = PCI_VENDOR_ID_INTEL,
84         .device = 0x24dd,
85 };