src/southbridge/intel/i82801gx/i82801gx_ide.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 #include <console/console.h>
  22 #include <device/device.h>
  23 #include <device/pci.h>
  24 #include <device/pci_ids.h>
  25 #include "i82801gx.h"
  26
  27 typedef struct southbridge_intel_i82801gx_config config_t;
  28
  29 static void ide_init(struct device *dev)
  30 {
  31         u16 ideTimingConfig;
  32         u32 reg32;
  33
  34         /* Get the chip configuration */
  35         config_t *config = dev->chip_info;
  36
  37         int enable_primary = config->ide_enable_primary;
  38         int enable_secondary = config->ide_enable_secondary;
  39
  40         reg32 = pci_read_config32(dev, PCI_COMMAND);
  41         pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_IO | PCI_COMMAND_MASTER);
  42
  43         /* Native Capable, but not enabled. */
  44         pci_write_config8(dev, 0x09, 0x8a);
  45
  46         ideTimingConfig = pci_read_config16(dev, IDE_TIM_PRI);
  47         ideTimingConfig &= ~IDE_DECODE_ENABLE;
  48         ideTimingConfig |= IDE_SITRE;
  49         if (enable_primary) {
  50                 /* Enable primary IDE interface. */
  51                 ideTimingConfig |= IDE_DECODE_ENABLE;
  52                 ideTimingConfig |= (2 << 12); // ISP = 3 clocks
  53                 ideTimingConfig |= (3 << 8); // RCT = 1 clock
  54                 ideTimingConfig |= (1 << 1); // IE0
  55                 ideTimingConfig |= (1 << 0); // TIME0
  56                 printk_debug("IDE0 ");
  57         }
  58         pci_write_config16(dev, IDE_TIM_PRI, ideTimingConfig);
  59
  60         ideTimingConfig = pci_read_config16(dev, IDE_TIM_SEC);
  61         ideTimingConfig &= ~IDE_DECODE_ENABLE;
  62         ideTimingConfig |= IDE_SITRE;
  63         if (enable_secondary) {
  64                 /* Enable secondary IDE interface. */
  65                 ideTimingConfig |= IDE_DECODE_ENABLE;
  66                 ideTimingConfig |= (2 << 12); // ISP = 3 clocks
  67                 ideTimingConfig |= (3 << 8); // RCT = 1 clock
  68                 ideTimingConfig |= (1 << 1); // IE0
  69                 ideTimingConfig |= (1 << 0); // TIME0
  70                 printk_debug("IDE1 ");
  71         }
  72         pci_write_config16(dev, IDE_TIM_SEC, ideTimingConfig);
  73
  74         /* Set IDE I/O Configuration */
  75         if (enable_secondary)
  76                 reg32 = SIG_MODE_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
  77         else
  78                 reg32 = SIG_MODE_NORMAL | FAST_PCB1 | PCB1;
  79         pci_write_config32(dev, IDE_CONFIG, reg32);
  80
  81         /* Set Interrupt Line */
  82         /* Interrupt Pin is set by D31IP.PIP */
  83         pci_write_config32(dev, INTR_LN, 0xff); /* Int 15 */
  84 }
  85
  86 static struct device_operations ide_ops = {
  87         .read_resources         = pci_dev_read_resources,
  88         .set_resources          = pci_dev_set_resources,
  89         .enable_resources       = pci_dev_enable_resources,
  90         .init                   = ide_init,
  91         .scan_bus               = 0,
  92         .enable                 = i82801gx_enable,
  93 };
  94
  95 /* 82801Gx */
  96 static const struct pci_driver i82801gx_ide __pci_driver = {
  97         .ops    = &ide_ops,
  98         .vendor = PCI_VENDOR_ID_INTEL,
  99         .device = 0x27df,
 100 };