2 * This file is part of the coreboot project.
4 * Copyright (C) 2008-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <arch/romcc_io.h>
23 #include <console/console.h>
24 #include <device/pci_ids.h>
25 #include <device/pci_def.h>
27 #include "i82801gx_smbus.h"
29 int smbus_read_byte(unsigned device, unsigned address);
31 void enable_smbus(void)
35 /* Set the SMBus device statically. */
36 dev = PCI_DEV(0x0, 0x1f, 0x3);
38 /* Check to make sure we've got the right device. */
39 if (pci_read_config16(dev, 0x2) != 0x27da) {
40 die("SMBus controller not found!");
43 /* Set SMBus I/O base. */
44 pci_write_config32(dev, SMB_BASE,
45 SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
47 /* Set SMBus enable. */
48 pci_write_config8(dev, HOSTC, HST_EN);
50 /* Set SMBus I/O space enable. */
51 pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
53 /* Disable interrupt generation. */
54 outb(0, SMBUS_IO_BASE + SMBHSTCTL);
56 /* Clear any lingering errors, so transactions can run. */
57 outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
58 print_debug("SMBus controller enabled.\n");
61 int smbus_read_byte(unsigned device, unsigned address)
63 return do_smbus_read_byte(SMBUS_IO_BASE, device, address);