2 * This file is part of the coreboot project.
4 * Copyright (C) 2008-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <console/console.h>
22 #include <device/device.h>
23 #include <device/pci.h>
26 void i82801gx_enable(device_t dev)
31 reg32 = pci_read_config32(dev, PCI_COMMAND);
32 reg32 |= PCI_COMMAND_SERR;
33 pci_write_config32(dev, PCI_COMMAND, reg32);
36 struct chip_operations southbridge_intel_i82801gx_ops = {
37 CHIP_NAME("Intel ICH7/ICH7-M (82801Gx) Series Southbridge")
38 .enable_dev = i82801gx_enable,