2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 // Intel PCI to PCI bridge 0:1e.0
26 Name (_ADR, 0x001e0000)
30 Name (_ADR, 0x00000000)
31 Name (_PRW, Package(){ 11, 4 })
36 Name (_ADR, 0x00010000)
37 Name (_PRW, Package(){ 11, 4 })
42 Name (_ADR, 0x00020000)
43 Name (_PRW, Package(){ 11, 4 })
48 Name (_ADR, 0x00050000)
49 Name (_PRW, Package(){ 11, 4 })
54 Name (_ADR, 0x00080000)
55 Name (_PRW, Package(){ 11, 3 })
60 Name (_ADR, 0x00000000)
61 Name (_PRW, Package(){ 11, 3 })
64 // TODO: How many slots, where?
66 // PCI Interrupt Routing.
67 // If PICM is set, interrupts are routed over the i8259, otherwise
68 // over the IOAPIC. (Really? If they're above 15 they need to be routed
69 // fixed over the IOAPIC?)
73 Include ("acpi/ich7_pci_irqs.asl")