fdbb7d2d0d00ed8ce9bee59df79702413124546f
[coreboot.git] / src / southbridge / intel / i82801dx / chip.h
1 #ifndef I82801DX_CHIP_H
2 #define I82801DX_CHIP_H
3
4 struct southbridge_intel_i82801dx_config 
5 {
6         int enable_usb;
7         int enable_native_ide;
8         /**
9          * Interrupt Routing configuration
10          * If bit7 is 1, the interrupt is disabled.
11          */
12         uint8_t pirqa_routing;
13         uint8_t pirqb_routing;
14         uint8_t pirqc_routing;
15         uint8_t pirqd_routing;
16         uint8_t pirqe_routing;
17         uint8_t pirqf_routing;
18         uint8_t pirqg_routing;
19         uint8_t pirqh_routing;
20
21         uint8_t ide0_enable;
22         uint8_t ide1_enable;
23 };
24
25 extern struct chip_operations southbridge_intel_i82801dx_ops;
26
27 #endif /* I82801DBM_CHIP_H */