src/southbridge/intel/i82801dbm/i82801dbm.c

   1 #include <console/console.h>
   2 #include <device/device.h>
   3 #include <device/pci.h>
   4 #include <device/pci_ids.h>
   5 #include "i82801dbm.h"
   6
   7 void i82801dbm_enable(device_t dev)
   8 {
   9         unsigned int index = 0;
  10         uint8_t bHasDisableBit = 0;
  11         uint16_t cur_disable_mask, new_disable_mask;
  12
  13 //      all 82801dbm devices are in bus 0
  14         unsigned int devfn = PCI_DEVFN(0x1f, 0); // lpc
  15         device_t lpc_dev = dev_find_slot(0, devfn); // 0
  16         if (!lpc_dev)
  17                 return;
  18
  19         // Calculate disable bit position for specified device:function
  20         // NOTE: For ICH-4, only the following devices can be disabled:
  21         //               D31: F0, F1, F3, F5, F6,
  22         //               D29: F0, F1, F2, F7
  23
  24     if (PCI_SLOT(dev->path.pci.devfn) == 31) {
  25         index = PCI_FUNC(dev->path.pci.devfn);
  26
  27                 switch (index) {
  28                         case 0:
  29                         case 1:
  30                         case 3:
  31                         case 5:
  32                         case 6:
  33                                 bHasDisableBit = 1;
  34                                 break;
  35
  36                         default:
  37                                 break;
  38                 };
  39
  40                 if (index == 0)
  41                         index = 14;             // D31:F0 bit is an exception
  42
  43     } else if (PCI_SLOT(dev->path.pci.devfn) == 29) {
  44         index = 8 + PCI_FUNC(dev->path.pci.devfn);
  45
  46                 if ((PCI_FUNC(dev->path.pci.devfn) < 3) || (PCI_FUNC(dev->path.pci.devfn) == 7))
  47                         bHasDisableBit = 1;
  48     }
  49
  50         if (bHasDisableBit) {
  51                 cur_disable_mask = pci_read_config16(lpc_dev, FUNC_DIS);
  52                 new_disable_mask = cur_disable_mask & ~(1<<index);              // enable it
  53                 if (!dev->enabled) {
  54                         new_disable_mask |= (1<<index);  // disable it
  55                 }
  56                 if (new_disable_mask != cur_disable_mask) {
  57                         pci_write_config16(lpc_dev, FUNC_DIS, new_disable_mask);
  58                 }
  59         }
  60 }
  61
  62 struct chip_operations southbridge_intel_i82801dbm_ops = {
  63         CHIP_NAME("Intel 82801DBM Southbridge")
  64         .enable_dev = i82801dbm_enable,
  65 };