src/southbridge/intel/i3100/i3100_sata.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Arastra, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  *
  19  */
  20
  21 /* This code is based on src/southbridge/intel/esb6300/esb6300_sata.c */
  22
  23 #include <console/console.h>
  24 #include <device/device.h>
  25 #include <device/pci.h>
  26 #include <device/pci_ids.h>
  27 #include <device/pci_ops.h>
  28 #include "i3100.h"
  29
  30 static void sata_init(struct device *dev)
  31 {
  32         /* Enable SATA devices */
  33
  34         printk_debug("SATA init\n");
  35         /* SATA configuration */
  36         pci_write_config8(dev, 0x04, 0x07);
  37         pci_write_config8(dev, 0x09, 0x8f);
  38
  39         /* Set timings */
  40         pci_write_config16(dev, 0x40, 0x0a307);
  41         pci_write_config16(dev, 0x42, 0x0a307);
  42
  43         /* Sync DMA */
  44         pci_write_config16(dev, 0x48, 0x000f);
  45         pci_write_config16(dev, 0x4a, 0x1111);
  46
  47         /* Fast ATA */
  48         pci_write_config16(dev, 0x54, 0x1000);
  49
  50         /* Select IDE mode */
  51         pci_write_config8(dev, 0x90, 0x00);
  52
  53         /* Enable ports 0-3 */
  54         pci_write_config8(dev, 0x92, 0x0f);
  55
  56         printk_debug("SATA Enabled\n");
  57 }
  58
  59 static void sata_set_subsystem(device_t dev, unsigned vendor, unsigned device)
  60 {
  61         pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
  62                 ((device & 0xffff) << 16) | (vendor & 0xffff));
  63 }
  64
  65 static struct pci_operations lops_pci = {
  66         .set_subsystem = sata_set_subsystem,
  67 };
  68
  69 static struct device_operations sata_ops  = {
  70         .read_resources   = pci_dev_read_resources,
  71         .set_resources    = pci_dev_set_resources,
  72         .enable_resources = pci_dev_enable_resources,
  73         .init             = sata_init,
  74         .scan_bus         = 0,
  75         .enable           = i3100_enable,
  76         .ops_pci          = &lops_pci,
  77 };
  78
  79 static struct pci_driver sata_driver __pci_driver = {
  80         .ops    = &sata_ops,
  81         .vendor = PCI_VENDOR_ID_INTEL,
  82         .device = PCI_DEVICE_ID_INTEL_3100_IDE,
  83 };
  84
  85 static struct pci_driver sata_driver_nr __pci_driver = {
  86         .ops    = &sata_ops,
  87         .vendor = PCI_VENDOR_ID_INTEL,
  88         .device = PCI_DEVICE_ID_INTEL_3100_AHCI,
  89 };
  90
  91 static struct pci_driver sata_driver_ep80579 __pci_driver = {
  92         .ops    = &sata_ops,
  93         .vendor = PCI_VENDOR_ID_INTEL,
  94         .device = PCI_DEVICE_ID_INTEL_EP80579_IDE,
  95 };
  96
  97 static struct pci_driver sata_driver_nr_ep80579 __pci_driver = {
  98         .ops    = &sata_ops,
  99         .vendor = PCI_VENDOR_ID_INTEL,
 100         .device = PCI_DEVICE_ID_INTEL_EP80579_AHCI,
 101 };