2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Arastra, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #define SMBUS_IO_BASE 0x0f00
25 static void enable_smbus(void)
27 device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
29 print_spew("SMBus controller enabled\n");
30 pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
31 pci_write_config8(dev, 0x40, 1);
32 pci_write_config8(dev, 0x4, 1);
34 outb(4, SMBUS_IO_BASE + SMBSLVCMD);
36 /* Disable interrupt generation */
37 outb(0, SMBUS_IO_BASE + SMBHSTCTL);
40 static int smbus_read_byte(u32 device, u32 address)
42 return do_smbus_read_byte(SMBUS_IO_BASE, device, address);