src/southbridge/intel/esb6300/esb6300_pic.c

   1 /*
   2  * (C) 2004 Linux Networx
   3  */
   4 #include <console/console.h>
   5 #include <device/device.h>
   6 #include <device/pci.h>
   7 #include <device/pci_ids.h>
   8 #include <device/pci_ops.h>
   9 #include "esb6300.h"
  10
  11 #define ALL             (0xff << 24)
  12 #define NONE            (0)
  13 #define DISABLED        (1 << 16)
  14 #define ENABLED         (0 << 16)
  15 #define TRIGGER_EDGE    (0 << 15)
  16 #define TRIGGER_LEVEL   (1 << 15)
  17 #define POLARITY_HIGH   (0 << 13)
  18 #define POLARITY_LOW    (1 << 13)
  19 #define PHYSICAL_DEST   (0 << 11)
  20 #define LOGICAL_DEST    (1 << 11)
  21 #define ExtINT          (7 << 8)
  22 #define NMI             (4 << 8)
  23 #define SMI             (2 << 8)
  24 #define INT             (1 << 8)
  25
  26 static void setup_ioapic(device_t dev)
  27 {
  28         int i;
  29         unsigned long value_low, value_high;
  30         unsigned long ioapic_base = 0xfec10000;
  31         volatile unsigned long *l;
  32         unsigned interrupts;
  33
  34         l = (unsigned long *) ioapic_base;
  35
  36         l[0] = 0x01;
  37         interrupts = (l[04] >> 16) & 0xff;
  38         for (i = 0; i < interrupts; i++) {
  39                 l[0] = (i * 2) + 0x10;
  40                 l[4] = DISABLED;
  41                 value_low = l[4];
  42                 l[0] = (i * 2) + 0x11;
  43                 l[4] = NONE; /* Should this be an address? */
  44                 value_high = l[4];
  45                 if (value_low == 0xffffffff) {
  46                         printk_warning("%s IO APIC not responding.\n",
  47                                 dev_path(dev));
  48                         return;
  49                 }
  50         }
  51 }
  52
  53 static void pic_init(struct device *dev)
  54 {
  55
  56         uint16_t word;
  57
  58         /* Clear system errors */
  59         word = pci_read_config16(dev, 0x06);
  60         word |= 0xf900; /* Clear possible errors */
  61         pci_write_config16(dev, 0x06, word);
  62
  63         /* enable interrupt lines */
  64         pci_write_config8(dev, 0x3c, 0xff);
  65
  66         /* Setup the ioapic */
  67         setup_ioapic(dev);
  68 }
  69
  70 static void pic_read_resources(device_t dev)
  71 {
  72         struct resource *res;
  73
  74         /* Get the normal pci resources of this device */
  75         pci_dev_read_resources(dev);
  76
  77         /* Report the pic1 mbar resource */
  78         res = new_resource(dev, 0x44);
  79         res->base  = 0xfec10000;
  80         res->size  = 256;
  81         res->limit = res->base + res->size -1;
  82         res->align = 8;
  83         res->gran  = 8;
  84         res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
  85                 IORESOURCE_STORED | IORESOURCE_ASSIGNED;
  86         dev->command |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
  87 }
  88
  89 static struct pci_operations lops_pci = {
  90         /* Can we set the pci subsystem and device id? */
  91         .set_subsystem = 0,
  92 };
  93
  94 static struct device_operations pci_ops  = {
  95         .read_resources   = pic_read_resources,
  96         .set_resources    = pci_dev_set_resources,
  97         .enable_resources = pci_dev_enable_resources,
  98         .init             = pic_init,
  99         .scan_bus         = 0,
 100         .enable           = esb6300_enable,
 101         .ops_pci          = &lops_pci,
 102 };
 103
 104 static const struct pci_driver pci_driver __pci_driver = {
 105         .ops    = &pci_ops,
 106         .vendor = PCI_VENDOR_ID_INTEL,
 107         .device = PCI_DEVICE_ID_INTEL_6300ESB_APIC1,
 108 };
 109