1 struct southbridge_intel_esb6300_config
3 #define ESB6300_GPIO_USE_MASK 0x03
4 #define ESB6300_GPIO_USE_DEFAULT 0x00
5 #define ESB6300_GPIO_USE_AS_NATIVE 0x01
6 #define ESB6300_GPIO_USE_AS_GPIO 0x02
8 #define ESB6300_GPIO_SEL_MASK 0x0c
9 #define ESB6300_GPIO_SEL_DEFAULT 0x00
10 #define ESB6300_GPIO_SEL_OUTPUT 0x04
11 #define ESB6300_GPIO_SEL_INPUT 0x08
13 #define ESB6300_GPIO_LVL_MASK 0x30
14 #define ESB6300_GPIO_LVL_DEFAULT 0x00
15 #define ESB6300_GPIO_LVL_LOW 0x10
16 #define ESB6300_GPIO_LVL_HIGH 0x20
17 #define ESB6300_GPIO_LVL_BLINK 0x30
19 #define ESB6300_GPIO_INV_MASK 0xc0
20 #define ESB6300_GPIO_INV_DEFAULT 0x00
21 #define ESB6300_GPIO_INV_OFF 0x40
22 #define ESB6300_GPIO_INV_ON 0x80
25 unsigned char gpio[64];
26 unsigned int pirq_a_d;
27 unsigned int pirq_e_h;
29 extern struct chip_operations southbridge_intel_esb6300_ops;