2 * This file is part of the coreboot project.
4 * Copyright (C) 2005 AMD
5 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <device/smbus_def.h>
23 #define SMBHSTSTAT 0x0
24 #define SMBSLVSTAT 0x1
25 #define SMBHSTCTRL 0x2
27 #define SMBHSTADDR 0x4
28 #define SMBHSTDAT0 0x5
29 #define SMBHSTDAT1 0x6
30 #define SMBHSTBLKDAT 0x7
32 #define SMBSLVCTRL 0x8
33 #define SMBSLVCMD_SHADOW 0x9
38 /* Between 1-10 seconds, We should never timeout normally
39 * Longer than this is just painful when a timeout condition occurs.
41 #define SMBUS_TIMEOUT (100*1000*10)
43 static inline void smbus_delay(void)
48 static int smbus_wait_until_ready(unsigned smbus_io_base)
51 loops = SMBUS_TIMEOUT;
54 val = inb(smbus_io_base + SMBHSTSTAT);
56 if (val == 0) { // ready now
59 outb(val, smbus_io_base + SMBHSTSTAT);
61 return -2; // time out
64 static int smbus_wait_until_done(unsigned smbus_io_base)
67 loops = SMBUS_TIMEOUT;
71 val = inb(smbus_io_base + SMBHSTSTAT);
72 val &= 0x1f; // mask off reserved bits
77 outb(val, smbus_io_base + SMBHSTSTAT); // clear status
84 static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device)
88 if (smbus_wait_until_ready(smbus_io_base) < 0) {
89 return -2; // not ready
92 /* set the device I'm talking too */
93 outb(((device & 0x7f) << 1)|1 , smbus_io_base + SMBHSTADDR);
95 byte = inb(smbus_io_base + SMBHSTCTRL);
96 byte &= 0xe3; // Clear [4:2]
97 byte |= (1<<2) | (1<<6); // Byte data read/write command, start the command
98 outb(byte, smbus_io_base + SMBHSTCTRL);
100 /* poll for transaction completion */
101 if (smbus_wait_until_done(smbus_io_base) < 0) {
102 return -3; // timeout or error
105 /* read results of transaction */
106 byte = inb(smbus_io_base + SMBHSTCMD);
111 static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device, unsigned char val)
115 if (smbus_wait_until_ready(smbus_io_base) < 0) {
116 return -2; // not ready
119 /* set the command... */
120 outb(val, smbus_io_base + SMBHSTCMD);
122 /* set the device I'm talking too */
123 outb(((device & 0x7f) << 1)|0 , smbus_io_base + SMBHSTADDR);
125 byte = inb(smbus_io_base + SMBHSTCTRL);
126 byte &= 0xe3; // Clear [4:2]
127 byte |= (1<<2) | (1<<6); // Byte data read/write command, start the command
128 outb(byte, smbus_io_base + SMBHSTCTRL);
130 /* poll for transaction completion */
131 if (smbus_wait_until_done(smbus_io_base) < 0) {
132 return -3; // timeout or error
138 static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address)
142 if (smbus_wait_until_ready(smbus_io_base) < 0) {
143 return -2; // not ready
146 /* set the command/address... */
147 outb(address & 0xff, smbus_io_base + SMBHSTCMD);
149 /* set the device I'm talking too */
150 outb(((device & 0x7f) << 1)|1 , smbus_io_base + SMBHSTADDR);
152 byte = inb(smbus_io_base + SMBHSTCTRL);
153 byte &= 0xe3; // Clear [4:2]
154 byte |= (1<<3) | (1<<6); // Byte data read/write command, start the command
155 outb(byte, smbus_io_base + SMBHSTCTRL);
157 /* poll for transaction completion */
158 if (smbus_wait_until_done(smbus_io_base) < 0) {
159 return -3; // timeout or error
162 /* read results of transaction */
163 byte = inb(smbus_io_base + SMBHSTDAT0);
168 static int do_smbus_write_byte(unsigned smbus_io_base, unsigned device, unsigned address, unsigned char val)
172 if (smbus_wait_until_ready(smbus_io_base) < 0) {
173 return -2; // not ready
176 /* set the command/address... */
177 outb(address & 0xff, smbus_io_base + SMBHSTCMD);
179 /* set the device I'm talking too */
180 outb(((device & 0x7f) << 1)|0 , smbus_io_base + SMBHSTADDR);
183 outb(val, smbus_io_base + SMBHSTDAT0);
185 byte = inb(smbus_io_base + SMBHSTCTRL);
186 byte &= 0xe3; // Clear [4:2]
187 byte |= (1<<3) | (1<<6); // Byte data read/write command, start the command
188 outb(byte, smbus_io_base + SMBHSTCTRL);
190 /* poll for transaction completion */
191 if (smbus_wait_until_done(smbus_io_base) < 0) {
192 return -3; // timeout or error