Ever wondered where those "setting incorrect section attributes for
[coreboot.git] / src / southbridge / broadcom / bcm5785 / bcm5785_lpc.c
1 /*
2  * Copyright  2005 AMD
3  *  by yinghai.lu@amd.com
4  */
5
6 #include <console/console.h>
7 #include <device/device.h>
8 #include <device/pci.h>
9 #include <device/pnp.h>
10 #include <device/pci_ids.h>
11 #include <device/pci_ops.h>
12 #include <pc80/mc146818rtc.h>
13 #include <pc80/isa-dma.h>
14 #include <bitops.h>
15 #include <arch/io.h>
16 #include "bcm5785.h"
17
18 static void lpc_init(device_t dev)
19 {
20
21         /* Initialize the real time clock */
22         rtc_init(0);
23
24         /* Initialize isa dma */
25         isa_dma_init();
26
27 }
28
29 static void bcm5785_lpc_read_resources(device_t dev)
30 {
31         struct resource *res;
32         unsigned long index;
33
34         /* Get the normal pci resources of this device */
35         pci_dev_read_resources(dev); 
36         
37         /* Add an extra subtractive resource for both memory and I/O */
38         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
39         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
40         
41         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
42         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
43
44 }
45
46 /**     
47  * @brief Enable resources for children devices
48  *      
49  * @param dev the device whos children's resources are to be enabled
50  *      
51  * This function is call by the global enable_resources() indirectly via the
52  * device_operation::enable_resources() method of devices.
53  *      
54  * Indirect mutual recursion:
55  *      enable_childrens_resources() -> enable_resources()
56  *      enable_resources() -> device_operation::enable_resources()
57  *      device_operation::enable_resources() -> enable_children_resources()
58  */     
59 static void bcm5785_lpc_enable_childrens_resources(device_t dev)
60 {       
61         unsigned link; 
62         uint32_t reg;
63         int i;
64         int var_num = 0;
65         
66         reg = pci_read_config8(dev, 0x44);
67
68         for (link = 0; link < dev->links; link++) {
69                 device_t child;
70                 for (child = dev->link[link].children; child; child = child->sibling) {
71                         enable_resources(child);
72                         if(child->have_resources && (child->path.type == DEVICE_PATH_PNP)) {
73                                 for(i=0;i<child->resources;i++) {
74                                         struct resource *res;
75                                         unsigned long base, end; // don't need long long
76                                         res = &child->resource[i];
77                                         if(!(res->flags & IORESOURCE_IO)) continue;
78                                         base = res->base;
79                                         end = resource_end(res);
80                                         printk_debug("bcm5785lpc decode:%s, base=0x%08x, end=0x%08x\r\n",dev_path(child),base, end);
81                                         switch(base) {
82                                         case 0x60: //KBC
83                                         case 0x64:
84                                                 reg |= (1<<29);
85                                         case 0x3f8: // COM1
86                                                 reg |= (1<<6);  break;
87                                         case 0x2f8: // COM2
88                                                 reg |= (1<<7);  break; 
89                                         case 0x378: // Parallal 1
90                                                 reg |= (1<<0); break;
91                                         case 0x3f0: // FD0 
92                                                 reg |= (1<<26); break;
93                                         case 0x220:  // Aduio 0
94                                                 reg |= (1<<14); break;
95                                         case 0x300:  // Midi 0
96                                                 reg |= (1<<18); break;
97                                         }
98                                 }
99                         }
100                 }
101         }
102         pci_write_config32(dev, 0x44, reg);
103         
104
105 }
106
107 static void bcm5785_lpc_enable_resources(device_t dev)
108 {
109         pci_dev_enable_resources(dev);
110         bcm5785_lpc_enable_childrens_resources(dev);
111 }
112
113 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
114 {
115         pci_write_config32(dev, 0x40,
116                 ((device & 0xffff) << 16) | (vendor & 0xffff));
117 }
118
119 static struct pci_operations lops_pci = {
120         .set_subsystem = lpci_set_subsystem,
121 };
122
123 static struct device_operations lpc_ops  = {
124         .read_resources   = bcm5785_lpc_read_resources,
125         .set_resources    = pci_dev_set_resources,
126         .enable_resources = bcm5785_lpc_enable_resources,
127         .init             = lpc_init,
128         .scan_bus         = scan_static_bus,
129 //      .enable           = bcm5785_enable,
130         .ops_pci          = &lops_pci,
131 };
132 static const struct pci_driver lpc_driver __pci_driver = {
133         .ops    = &lpc_ops,
134         .vendor = PCI_VENDOR_ID_SERVERWORKS,
135         .device = PCI_DEVICE_ID_SERVERWORKS_BCM5785_LPC,
136 };
137