2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include "sb600_smbus.h"
22 static inline void smbus_delay(void)
27 static int smbus_wait_until_ready(u32 smbus_io_base)
30 loops = SMBUS_TIMEOUT;
33 val = inb(smbus_io_base + SMBHSTSTAT);
35 if (val == 0) { /* ready now */
38 outb(val, smbus_io_base + SMBHSTSTAT);
40 return -2; /* time out */
43 static int smbus_wait_until_done(u32 smbus_io_base)
46 loops = SMBUS_TIMEOUT;
50 val = inb(smbus_io_base + SMBHSTSTAT);
51 val &= 0x1f; /* mask off reserved bits */
53 return -5; /* error */
56 outb(val, smbus_io_base + SMBHSTSTAT); /* clear status */
60 return -3; /* timeout */
63 static int do_smbus_recv_byte(u32 smbus_io_base, u32 device)
67 if (smbus_wait_until_ready(smbus_io_base) < 0) {
68 return -2; /* not ready */
71 /* set the device I'm talking too */
72 outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR);
74 byte = inb(smbus_io_base + SMBHSTCTRL);
75 byte &= 0xe3; /* Clear [4:2] */
76 byte |= (1 << 2) | (1 << 6); /* Byte data read/write command, start the command */
77 outb(byte, smbus_io_base + SMBHSTCTRL);
79 /* poll for transaction completion */
80 if (smbus_wait_until_done(smbus_io_base) < 0) {
81 return -3; /* timeout or error */
84 /* read results of transaction */
85 byte = inb(smbus_io_base + SMBHSTCMD);
90 static int do_smbus_send_byte(u32 smbus_io_base, u32 device,
95 if (smbus_wait_until_ready(smbus_io_base) < 0) {
96 return -2; /* not ready */
99 /* set the command... */
100 outb(val, smbus_io_base + SMBHSTCMD);
102 /* set the device I'm talking too */
103 outb(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHSTADDR);
105 byte = inb(smbus_io_base + SMBHSTCTRL);
106 byte &= 0xe3; /* Clear [4:2] */
107 byte |= (1 << 2) | (1 << 6); /* Byte data read/write command, start the command */
108 outb(byte, smbus_io_base + SMBHSTCTRL);
110 /* poll for transaction completion */
111 if (smbus_wait_until_done(smbus_io_base) < 0) {
112 return -3; /* timeout or error */
118 int do_smbus_read_byte(u32 smbus_io_base, u32 device,
123 if (smbus_wait_until_ready(smbus_io_base) < 0) {
124 return -2; /* not ready */
127 /* set the command/address... */
128 outb(address & 0xff, smbus_io_base + SMBHSTCMD);
130 /* set the device I'm talking too */
131 outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR);
133 byte = inb(smbus_io_base + SMBHSTCTRL);
134 byte &= 0xe3; /* Clear [4:2] */
135 byte |= (1 << 3) | (1 << 6); /* Byte data read/write command, start the command */
136 outb(byte, smbus_io_base + SMBHSTCTRL);
138 /* poll for transaction completion */
139 if (smbus_wait_until_done(smbus_io_base) < 0) {
140 return -3; /* timeout or error */
143 /* read results of transaction */
144 byte = inb(smbus_io_base + SMBHSTDAT0);
149 int do_smbus_write_byte(u32 smbus_io_base, u32 device,
154 if (smbus_wait_until_ready(smbus_io_base) < 0) {
155 return -2; /* not ready */
158 /* set the command/address... */
159 outb(address & 0xff, smbus_io_base + SMBHSTCMD);
161 /* set the device I'm talking too */
162 outb(((device & 0x7f) << 1) | 0, smbus_io_base + SMBHSTADDR);
165 outb(val, smbus_io_base + SMBHSTDAT0);
167 byte = inb(smbus_io_base + SMBHSTCTRL);
168 byte &= 0xe3; /* Clear [4:2] */
169 byte |= (1 << 3) | (1 << 6); /* Byte data read/write command, start the command */
170 outb(byte, smbus_io_base + SMBHSTCTRL);
172 /* poll for transaction completion */
173 if (smbus_wait_until_done(smbus_io_base) < 0) {
174 return -3; /* timeout or error */
180 static void alink_ab_indx(u32 reg_space, u32 reg_addr,
185 outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX);
191 /* printk(BIOS_DEBUG, "about write %x, index=%x", tmp, (reg_space&0x3)<<30 | reg_addr); */
192 outl((reg_space & 0x3) << 30 | reg_addr, AB_INDX); /* probably we dont have to do it again. */
196 /* space = 0: AX_INDXC, AX_DATAC
197 * space = 1: AX_INDXP, AX_DATAP
199 static void alink_ax_indx(u32 space /*c or p? */ , u32 axindc,
204 /* read axindc to tmp */
205 outl(space << 30 | space << 3 | 0x30, AB_INDX);
206 outl(axindc, AB_DATA);
207 outl(space << 30 | space << 3 | 0x34, AB_INDX);
214 outl(space << 30 | space << 3 | 0x30, AB_INDX);
215 outl(axindc, AB_DATA);
216 outl(space << 30 | space << 3 | 0x34, AB_INDX);