83dea99883a6f6c24eeec7c163cc798f55a52135
[coreboot.git] / src / southbridge / amd / sb600 / sb600_lpc.c
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2008 Advanced Micro Devices, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
18  */
19
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
23 #include <device/pnp.h>
24 #include <device/pci_ids.h>
25 #include <device/pci_ops.h>
26 #include <pc80/mc146818rtc.h>
27 #include <pc80/isa-dma.h>
28 #include <bitops.h>
29 #include <arch/io.h>
30 #include "sb600.h"
31
32 static void lpc_init(device_t dev)
33 {
34         u8 byte;
35         u32 dword;
36         device_t sm_dev;
37
38         /* Enable the LPC Controller */
39         sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
40         dword = pci_read_config32(sm_dev, 0x64);
41         dword |= 1 << 20;
42         pci_write_config32(sm_dev, 0x64, dword);
43
44         /* Initialize isa dma */
45         isa_dma_init();
46
47         /* RPR 7.2 Enable DMA transaction on the LPC bus */
48         byte = pci_read_config8(dev, 0x40);
49         byte |= (1 << 2);
50         pci_write_config8(dev, 0x40, byte);
51
52         /* RPR 7.3 Disable the timeout mechanism on LPC */
53         byte = pci_read_config8(dev, 0x48);
54         byte &= ~(1 << 7);
55         pci_write_config8(dev, 0x48, byte);
56
57         /* RPR 7.5 Disable LPC MSI Capability */
58         byte = pci_read_config8(dev, 0x78);
59         byte &= ~(1 << 1);
60         pci_write_config8(dev, 0x78, byte);
61
62 }
63
64 static void sb600_lpc_read_resources(device_t dev)
65 {
66         struct resource *res;
67
68         /* Get the normal pci resources of this device */
69         pci_dev_read_resources(dev);    /* We got one for APIC, or one more for TRAP */
70
71         pci_get_resource(dev, 0xA0); /* SPI ROM base address */
72
73         /* Add an extra subtractive resource for both memory and I/O */
74         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
75         res->flags =
76             IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
77
78         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
79         res->flags =
80             IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
81
82         compact_resources(dev);
83 }
84
85 /**     
86  * @brief Enable resources for children devices
87  *      
88  * @param dev the device whos children's resources are to be enabled
89  *      
90  * This function is call by the global enable_resources() indirectly via the
91  * device_operation::enable_resources() method of devices.
92  *      
93  * Indirect mutual recursion:
94  *      enable_childrens_resources() -> enable_resources()
95  *      enable_resources() -> device_operation::enable_resources()
96  *      device_operation::enable_resources() -> enable_children_resources()
97  */
98 static void sb600_lpc_enable_childrens_resources(device_t dev)
99 {
100         u32 link;
101         u32 reg, reg_x;
102         int i;
103         int var_num = 0;
104         u16 reg_var[3];
105
106         reg = pci_read_config32(dev, 0x44);
107         reg_x = pci_read_config32(dev, 0x48);
108
109         for (link = 0; link < dev->links; link++) {
110                 device_t child;
111                 for (child = dev->link[link].children; child;
112                      child = child->sibling) {
113                         enable_resources(child);
114                         if (child->have_resources
115                             && (child->path.type == DEVICE_PATH_PNP)) {
116                                 for (i = 0; i < child->resources; i++) {
117                                         struct resource *res;
118                                         unsigned long base, end;        /*  don't need long long */
119                                         res = &child->resource[i];
120                                         if (!(res->flags & IORESOURCE_IO))
121                                                 continue;
122                                         base = res->base;
123                                         end = resource_end(res);
124                                         printk_debug
125                                             ("sb600 lpc decode:%s, base=0x%08x, end=0x%08x\n",
126                                              dev_path(child), base, end);
127                                         switch (base) {
128                                         case 0x60:      /*  KB */
129                                         case 0x64:      /*  MS */
130                                                 reg |= (1 << 29);
131                                                 break;
132                                         case 0x3f8:     /*  COM1 */
133                                                 reg |= (1 << 6);
134                                                 break;
135                                         case 0x2f8:     /*  COM2 */
136                                                 reg |= (1 << 7);
137                                                 break;
138                                         case 0x378:     /*  Parallal 1 */
139                                                 reg |= (1 << 0);
140                                                 break;
141                                         case 0x3f0:     /*  FD0 */
142                                                 reg |= (1 << 26);
143                                                 break;
144                                         case 0x220:     /*  Aduio 0 */
145                                                 reg |= (1 << 8);
146                                                 break;
147                                         case 0x300:     /*  Midi 0 */
148                                                 reg |= (1 << 18);
149                                                 break;
150                                         case 0x400:
151                                                 reg_x |= (1 << 16);
152                                                 break;
153                                         case 0x480:
154                                                 reg_x |= (1 << 17);
155                                                 break;
156                                         case 0x500:
157                                                 reg_x |= (1 << 18);
158                                                 break;
159                                         case 0x580:
160                                                 reg_x |= (1 << 19);
161                                                 break;
162                                         case 0x4700:
163                                                 reg_x |= (1 << 22);
164                                                 break;
165                                         case 0xfd60:
166                                                 reg_x |= (1 << 23);
167                                                 break;
168                                         default:
169                                                 if (var_num >= 3)
170                                                         continue;       /* only 3 var ; compact them ? */
171                                                 switch (var_num) {
172                                                 case 0:
173                                                         reg_x |= (1 << 2);
174                                                         break;
175                                                 case 1:
176                                                         reg_x |= (1 << 24);
177                                                         break;
178                                                 case 2:
179                                                         reg_x |= (1 << 25);
180                                                         break;
181                                                 }
182                                                 reg_var[var_num++] =
183                                                     base & 0xffff;
184                                         }
185                                 }
186                         }
187                 }
188         }
189         pci_write_config32(dev, 0x44, reg);
190         pci_write_config32(dev, 0x48, reg_x);
191         /* Set WideIO for as many IOs found (fall through is on purpose) */
192         switch (var_num) {
193         case 2:
194                 pci_write_config16(dev, 0x90, reg_var[2]);
195         case 1:
196                 pci_write_config16(dev, 0x66, reg_var[1]);
197         case 0:
198                 pci_write_config16(dev, 0x64, reg_var[0]);
199                 break;
200         }
201 }
202
203 static void sb600_lpc_enable_resources(device_t dev)
204 {
205         pci_dev_enable_resources(dev);
206         sb600_lpc_enable_childrens_resources(dev);
207 }
208
209 static struct pci_operations lops_pci = {
210         .set_subsystem = pci_dev_set_subsystem,
211 };
212
213 static struct device_operations lpc_ops = {
214         .read_resources = sb600_lpc_read_resources,
215         .set_resources = pci_dev_set_resources,
216         .enable_resources = sb600_lpc_enable_resources,
217         .init = lpc_init,
218         .scan_bus = scan_static_bus,
219         /* .enable           = sb600_enable, */
220         .ops_pci = &lops_pci,
221 };
222 static struct pci_driver lpc_driver __pci_driver = {
223         .ops = &lpc_ops,
224         .vendor = PCI_VENDOR_ID_ATI,
225         .device = PCI_DEVICE_ID_ATI_SB600_LPC,
226 };