2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/device.h>
22 #include <device/pci.h>
23 #include <device/pci_ids.h>
24 #include <device/pci_ops.h>
29 #define HDA_ICII_REG 0x68
30 #define HDA_ICII_BUSY (1 << 0)
31 #define HDA_ICII_VALID (1 << 1)
33 static int set_bits(u8 * port, u32 mask, u32 val)
38 /* Write (val & ~mask) to port */
45 /* Wait for readback of register to
46 * match what was just written to it
50 /* Wait 1ms based on BKDG wait time */
54 } while ((dword != val) && --count);
62 static u32 codec_detect(u8 * base)
66 /* Set Bit0 to 0 to enter reset state (BAR + 0x8)[0] */
67 if (set_bits(base + 0x08, 1, 0) == -1)
70 /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
71 if (set_bits(base + 0x08, 1, 1) == -1)
74 /* Delay for 1 ms since the BKDG does */
77 /* Read in Codec location (BAR + 0xe)[3..0]*/
78 dword = readl(base + 0xe);
87 /* Put HDA back in reset (BAR + 0x8) [0] */
88 set_bits(base + 0x08, 1, 0);
89 printk_debug("No codec!\n");
93 static u32 cim_verb_data[] = {
154 static u32 find_verb(u32 viddid, u32 ** verb)
156 device_t azalia_dev = dev_find_slot(0, PCI_DEVFN(0x14, 2));
157 struct southbridge_amd_sb600_config *cfg =
158 (struct southbridge_amd_sb600_config *)azalia_dev->chip_info;
159 printk_debug("Dev=%s\n", dev_path(azalia_dev));
160 printk_debug("Default viddid=%x\n", cfg->hda_viddid);
161 printk_debug("Reading viddid=%x\n", viddid);
164 if (viddid != cfg->hda_viddid)
166 *verb = (u32 *) cim_verb_data;
167 return sizeof(cim_verb_data) / sizeof(u32);
171 * Wait 50usec for for the codec to indicate it is ready
172 * no response would imply that the codec is non-operative
175 static int wait_for_ready(u8 *base)
177 /* Use a 50 usec timeout - the Linux kernel uses the
183 u32 dword=readl(base + HDA_ICII_REG);
184 if (!(dword & HDA_ICII_BUSY))
193 * Wait 50usec for for the codec to indicate that it accepted
194 * the previous command. No response would imply that the code
198 static int wait_for_valid(u8 *base)
200 /* Use a 50 usec timeout - the Linux kernel uses the
205 u32 dword = readl(base + HDA_ICII_REG);
206 if ((dword & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
215 static void codec_init(u8 * base, int addr)
223 if (wait_for_ready(base) == -1)
226 dword = (addr << 28) | 0x000f0000;
227 writel(dword, base + 0x60);
229 if (wait_for_valid(base) == -1)
232 dword = readl(base + 0x64);
235 printk_debug("codec viddid: %08x\n", dword);
236 verb_size = find_verb(dword, &verb);
239 printk_debug("No verb!\n");
243 printk_debug("verb_size: %d\n", verb_size);
245 for (i = 0; i < verb_size; i++) {
246 if (wait_for_ready(base) == -1)
249 writel(verb[i], base + 0x60);
251 if (wait_for_valid(base) == -1)
254 printk_debug("verb loaded!\n");
257 static void codecs_init(u8 * base, u32 codec_mask)
260 for (i = 2; i >= 0; i--) {
261 if (codec_mask & (1 << i))
266 static void hda_init(struct device *dev)
271 struct resource *res;
275 /* Enable azalia - PM_io 0x59[4], disable ac97 - PM_io 0x59[1..0] */
276 pm_iowrite(0x59, 0xB);
279 /* FIXME: Need to find out why the call below crashes. */
280 /*sm_dev = dev_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_ATI_SB600_SM, 0);*/
281 sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
283 /* Set routing pin - SMBus ExtFunc (0xf8/0xfc) */
284 pci_write_config32(sm_dev, 0xf8, 0x00);
285 pci_write_config8(sm_dev, 0xfc, 0xAA);
286 /* Set INTA - SMBus 0x63 [2..0] */
287 byte = pci_read_config8(sm_dev, 0x63);
289 byte |= 0x0; /* INTA:0x0 - INTH:0x7 */
290 pci_write_config8(sm_dev, 0x63, byte);
292 /* Program the 2C to 0x437b1002 */
294 pci_write_config32(dev, 0x2c, dword);
297 /* Is this right? HDA allows for a 64-bit BAR
298 * but this is only setup for a 32-bit one
300 res = find_resource(dev, 0x10);
304 base = (u8 *) ((u32)res->base);
305 printk_debug("base = %p\n", base);
306 codec_mask = codec_detect(base);
309 printk_debug("codec_mask = %02x\n", codec_mask);
310 codecs_init(base, codec_mask);
314 static struct pci_operations lops_pci = {
315 .set_subsystem = pci_dev_set_subsystem,
318 static struct device_operations hda_audio_ops = {
319 .read_resources = pci_dev_read_resources,
320 .set_resources = pci_dev_set_resources,
321 .enable_resources = pci_dev_enable_resources,
322 /*.enable = sb600_enable, */
325 .ops_pci = &lops_pci,
328 static struct pci_driver hdaaudio_driver __pci_driver = {
329 .ops = &hda_audio_ops,
330 .vendor = PCI_VENDOR_ID_ATI,
331 .device = PCI_DEVICE_ID_ATI_SB600_HDA,