1 //#include <device/smbus_def.h>
3 #define SMBUS_WAIT_UNTIL_READY_TIMEOUT -2
4 #define SMBUS_WAIT_UNTIL_DONE_TIMEOUT -3
8 #define SMB_CTRL_STS 0x02
11 #define SMB_CTRL2 0x05
12 #define SMB_CTRL3 0x06
14 #define SMB_STS_SLVSTP (0x01 << 7)
15 #define SMB_STS_SDAST (0x01 << 6)
16 #define SMB_STS_BER (0x01 << 5)
17 #define SMB_STS_NEGACK (0x01 << 4)
18 #define SMB_STS_STASTR (0x01 << 3)
19 #define SMB_STS_NMATCH (0x01 << 2)
20 #define SMB_STS_MASTER (0x01 << 1)
21 #define SMB_STS_XMIT (0x01 << 0)
23 #define SMB_CSTS_TGSCL (0x01 << 5)
24 #define SMB_CSTS_TSDA (0x01 << 4)
25 #define SMB_CSTS_GCMTCH (0x01 << 3)
26 #define SMB_CSTS_MATCH (0x01 << 2)
27 #define SMB_CSTS_BB (0x01 << 1)
28 #define SMB_CSTS_BUSY (0x01 << 0)
30 #define SMB_CTRL1_STASTRE (0x01 << 7)
31 #define SMB_CTRL1_NMINTE (0x01 << 6)
32 #define SMB_CTRL1_GCMEN (0x01 << 5)
33 #define SMB_CTRL1_ACK (0x01 << 4)
34 #define SMB_CTRL1_RSVD (0x01 << 3)
35 #define SMB_CTRL1_INTEN (0x01 << 2)
36 #define SMB_CTRL1_STOP (0x01 << 1)
37 #define SMB_CTRL1_START (0x01 << 0)
39 #define SMB_ADD_SAEN (0x01 << 7)
41 #define SMB_CTRL2_ENABLE 0x01
43 #define SMBUS_TIMEOUT (100*1000*10)
44 #define SMBUS_STATUS_MASK 0xfbff
47 static void smbus_delay(void)
52 static int smbus_wait(unsigned smbus_io_base) {
53 unsigned long loops = SMBUS_TIMEOUT;
58 val = inb(smbus_io_base + SMB_STS);
59 if ((val & SMB_STS_SDAST) != 0)
61 if (val & (SMB_STS_BER | SMB_STS_NEGACK)) {
62 printk_debug("SMBUS WAIT ERROR %x\n", val);
67 outb(0, smbus_io_base + SMB_STS);
68 return loops ? 0 : SMBUS_WAIT_UNTIL_READY_TIMEOUT;
71 static int smbus_write(unsigned smbus_io_base, unsigned char byte) {
73 outb(byte, smbus_io_base + SMB_SDA);
74 return smbus_wait(smbus_io_base);
77 /* generate a smbus start condition */
78 static int smbus_start_condition(unsigned smbus_io_base)
82 /* issue a START condition */
83 val = inb(smbus_io_base + SMB_CTRL1);
84 outb(val | SMB_CTRL1_START, smbus_io_base + SMB_CTRL1);
86 /* check for bus conflict */
87 val = inb(smbus_io_base + SMB_STS);
88 if ((val & SMB_STS_BER) != 0)
91 return smbus_wait(smbus_io_base);
94 static int smbus_check_stop_condition(unsigned smbus_io_base)
98 loops = SMBUS_TIMEOUT;
99 /* check for SDA status */
102 val = inb(smbus_io_base + SMB_CTRL1);
103 if ((val & SMB_CTRL1_STOP) == 0) {
107 return loops?0:SMBUS_WAIT_UNTIL_READY_TIMEOUT;
109 /* Make sure everything is cleared and ready to go */
111 val = inb(smbus_io_base + SMB_CTRL1);
112 outb(val & ~(SMB_CTRL1_STASTRE | SMB_CTRL1_NMINTE),
113 smbus_io_base + SMB_CTRL1);
115 outb(SMB_STS_BER | SMB_STS_NEGACK | SMB_STS_STASTR,
116 smbus_io_base + SMB_STS);
118 val = inb(smbus_io_base + SMB_CTRL_STS);
119 outb(val | SMB_CSTS_BB, smbus_io_base + SMB_CTRL_STS);
122 static int smbus_stop_condition(unsigned smbus_io_base)
125 val = inb(smbus_io_base + SMB_CTRL1);
126 outb(SMB_CTRL1_STOP, smbus_io_base + SMB_CTRL1);
131 static int smbus_ack(unsigned smbus_io_base, int state)
133 unsigned char val = inb(smbus_io_base + SMB_CTRL1);
136 outb(val | SMB_CTRL1_ACK, smbus_io_base + SMB_CTRL1);
138 outb(val & ~SMB_CTRL1_ACK, smbus_io_base + SMB_CTRL1);
143 static int smbus_send_slave_address(unsigned smbus_io_base, unsigned char device)
147 /* send the slave address */
148 outb(device, smbus_io_base + SMB_SDA);
150 /* check for bus conflict and NACK */
151 val = inb(smbus_io_base + SMB_STS);
152 if (((val & SMB_STS_BER) != 0) ||
153 ((val & SMB_STS_NEGACK) != 0)) {
154 printk_debug("SEND SLAVE ERROR (%x)\n", val);
157 return smbus_wait(smbus_io_base);
160 static int smbus_send_command(unsigned smbus_io_base, unsigned char command)
164 /* send the command */
165 outb(command, smbus_io_base + SMB_SDA);
167 /* check for bus conflict and NACK */
168 val = inb(smbus_io_base + SMB_STS);
169 if (((val & SMB_STS_BER) != 0) ||
170 ((val & SMB_STS_NEGACK) != 0))
173 return smbus_wait(smbus_io_base);
176 static void _doread(unsigned smbus_io_base, unsigned char device,
177 unsigned char address, unsigned char *data, int count)
183 if ((ret = smbus_check_stop_condition(smbus_io_base)))
188 if ((ret = smbus_start_condition(smbus_io_base)))
192 if ((ret = smbus_send_slave_address(smbus_io_base, device)))
196 if ((ret = smbus_send_command(smbus_io_base, address)))
200 if ((ret = smbus_start_condition(smbus_io_base)))
203 /* Clear the ack for multiple byte reads */
204 smbus_ack(smbus_io_base, (count == 1) ? 1 : 0);
207 if ((ret = smbus_send_slave_address(smbus_io_base, device | 0x01)))
211 /* Set the ACK if this is the next to last byte */
212 smbus_ack(smbus_io_base, (count == 2) ? 1 : 0);
214 /* Set the stop bit if this is the last byte to read */
217 smbus_stop_condition(smbus_io_base);
219 val = inb(smbus_io_base + SMB_SDA);
223 int ret = smbus_wait(smbus_io_base);
234 printk_debug("SMBUS READ ERROR (%d): %d\n", index, ret);
237 static unsigned char do_smbus_read_byte(unsigned smbus_io_base,
238 unsigned char device,
239 unsigned char address)
241 unsigned char val = 0;
242 _doread(smbus_io_base, device, address, &val, sizeof(val));
246 static unsigned short do_smbus_read_word(unsigned smbus_io_base,
247 unsigned char device, unsigned char address)
249 unsigned short val = 0;
250 _doread(smbus_io_base, device, address, (unsigned char *) &val,
255 static int _dowrite(unsigned smbus_io_base, unsigned char device,
256 unsigned char address, unsigned char *data, int count) {
260 if ((ret = smbus_check_stop_condition(smbus_io_base)))
263 if ((ret = smbus_start_condition(smbus_io_base)))
266 if ((ret = smbus_send_slave_address(smbus_io_base, device)))
269 if ((ret = smbus_send_command(smbus_io_base, address)))
273 if ((ret = smbus_write(smbus_io_base, *data++)))
278 smbus_stop_condition(smbus_io_base);
282 printk_debug("SMBUS WRITE ERROR: %d\n", ret);
287 static int do_smbus_write_byte(unsigned smbus_io_base, unsigned char device,
288 unsigned char address, unsigned char data)
290 return _dowrite(smbus_io_base, device, address,
291 (unsigned char *) &data, 1);
294 static int do_smbus_write_word(unsigned smbus_io_base, unsigned char device, unsigned char address,
297 return _dowrite(smbus_io_base, device ,address, (unsigned char *) &data, 2);