1 #ifndef _SOUTHBRIDGE_AMD_CS5536
2 #define _SOUTHBRIDGE_AMD_CS5536
4 #define MAX_UNWANTED_VPCI 10 /* increase if needed */
6 extern struct chip_operations southbridge_amd_cs5536_ops;
8 struct southbridge_amd_cs5536_config {
9 /* interrupt enable for LPC bus */
10 int lpc_serirq_enable; /* how to enable, e.g. 0x80 */
11 int lpc_irq; /* what to enable, e.g. 0x18 */
12 int enable_gpio0_inta; /* almost always will be true */
13 int enable_ide_nand_flash; /* if you are using nand flash instead of IDE drive */
14 int enable_uarta; /* internal uarta interrupt enable */
15 int enable_USBP4_host; /* Enable USB Port 4 as a host */
16 /* following are IRQ numbers for various southbridge resources. */
17 /* I have guessed at some things, as I still don't have an lspci from anyone */
18 int ide_irq; /* f.2 */
19 int audio_irq; /* f.3 */
20 int usbf4_irq; /* f.4 */
21 int usbf5_irq; /* f.5 */
22 int usbf6_irq; /* f.6 */
23 int usbf7_irq; /* f.7 */
24 /* the following allow you to disable unwanted virtualized PCI devices */
25 unsigned long unwanted_vpci[MAX_UNWANTED_VPCI];
28 #endif /* _SOUTHBRIDGE_AMD_CS5536 */