2 * This file is part of the coreboot project.
4 * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 static void cs5530_enable_rom(void)
28 /* So far all CS5530(A) ISA bridges we've seen are at 00:12.0. */
29 device_t dev = PCI_DEV(0, 0x12, 0);
32 * Decode 0x000E0000-0x000FFFFF (128 KB), not just 64 KB, and
33 * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 KB.
35 * Make the ROM write-protected.
37 reg8 = pci_read_config8(dev, ROM_AT_LOGIC_CONTROL_REG);
38 reg8 |= LOWER_ROM_ADDRESS_RANGE;
39 reg8 |= UPPER_ROM_ADDRESS_RANGE;
40 reg8 &= ~ROM_WRITE_ENABLE;
41 pci_write_config8(dev, ROM_AT_LOGIC_CONTROL_REG, reg8);
43 /* Set positive decode on ROM. */
44 reg8 = pci_read_config8(dev, DECODE_CONTROL_REG2);
45 reg8 |= BIOS_ROM_POSITIVE_DECODE;
46 pci_write_config8(dev, DECODE_CONTROL_REG2, reg8);