1 /*****************************************************************************
2 * AMD Generic Encapsulated Software Architecture */
6 * Agesa structures and definitions
8 * Contains AMD AGESA/CIMx core interface
10 * @xrefitem bom "File Content Label" "Release Content"
12 * @e sub-project: Include
13 * @e \$Revision:$ @e \$Date:$
16 *****************************************************************************
18 * This file is part of the coreboot project.
20 * Copyright (C) 2010 Advanced Micro Devices, Inc.
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License as published by
24 * the Free Software Foundation; version 2 of the License.
26 * This program is distributed in the hope that it will be useful,
27 * but WITHOUT ANY WARRANTY; without even the implied warranty of
28 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
29 * GNU General Public License for more details.
31 * You should have received a copy of the GNU General Public License
32 * along with this program; if not, write to the Free Software
33 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 * ***************************************************************************
41 // AGESA Types and Definitions
47 #define LAST_ENTRY 0xFFFFFFFF
52 #define IMAGE_SIGNATURE 'DMA$'
54 typedef UINTN AGESA_STATUS;
56 #define AGESA_SUCCESS ((AGESA_STATUS) 0x0)
57 #define AGESA_ALERT ((AGESA_STATUS) 0x40000000)
58 #define AGESA_WARNING ((AGESA_STATUS) 0x40000001)
59 #define AGESA_UNSUPPORTED ((AGESA_STATUS) 0x80000003)
60 #define AGESA_ERROR ((AGESA_STATUS) 0xC0000001)
61 #define AGESA_CRITICAL ((AGESA_STATUS) 0xC0000002)
62 #define AGESA_FATAL ((AGESA_STATUS) 0xC0000003)
64 typedef AGESA_STATUS (*CALLOUT_ENTRY) (UINT32 Param1, UINTN Param2, VOID* ConfigPtr);
65 typedef AGESA_STATUS (*IMAGE_ENTRY) (IN OUT VOID* ConfigPtr);
66 typedef AGESA_STATUS (*MODULE_ENTRY) (IN OUT VOID* ConfigPtr);
68 ///This allocation type is used by the AmdCreateStruct entry point
70 PreMemHeap = 0, ///< Create heap in cache.
71 PostMemDram, ///< Create heap in memory.
72 ByHost ///< Create heap by Host.
75 /// These width descriptors are used by the library function, and others, to specify the data size
76 typedef enum ACCESS_WIDTH {
77 AccessWidth8 = 1, ///< Access width is 8 bits.
78 AccessWidth16, ///< Access width is 16 bits.
79 AccessWidth32, ///< Access width is 32 bits.
80 AccessWidth64, ///< Access width is 64 bits.
82 AccessS3SaveWidth8 = 0x81, ///< Save 8 bits data.
83 AccessS3SaveWidth16, ///< Save 16 bits data.
84 AccessS3SaveWidth32, ///< Save 32 bits data.
85 AccessS3SaveWidth64, ///< Save 64 bits data.
90 /// The standard header for all AGESA services.
91 typedef struct _AMD_CONFIG_PARAMS {
92 IN UINT32 ImageBasePtr; ///< The AGESA Image base address.
93 IN UINT32 Func; ///< The service desired, @sa dispatch.h.
94 IN UINT32 AltImageBasePtr; ///< Alternate Image location
95 IN UINT32 PcieBasePtr; ///< PCIe MMIO Base address, if configured.
96 union { ///< Callback pointer
97 IN UINT64 PlaceHolder; ///< Place holder
98 IN CALLOUT_ENTRY CalloutPtr; ///< For Callout from AGESA
100 IN OUT UINT32 Reserved[2]; ///< This space is reserved for future use.
104 /// AGESA Binary module header structure
105 typedef struct _AMD_IMAGE_HEADER {
106 IN UINT32 Signature; ///< Binary Signature
107 IN CHAR8 CreatorID[8]; ///< 8 characters ID
108 IN CHAR8 Version[12]; ///< 12 characters version
109 IN UINT32 ModuleInfoOffset; ///< Offset of module
110 IN UINT32 EntryPointAddress; ///< Entry address
111 IN UINT32 ImageBase; ///< Image base
112 IN UINT32 RelocTableOffset; ///< Relocate Table offset
113 IN UINT32 ImageSize; ///< Size
114 IN UINT16 Checksum; ///< Checksum
115 IN UINT8 ImageType; ///< Type
116 IN UINT8 V_Reserved; ///< Reserved
119 /// AGESA Binary module header structure
120 typedef struct _AMD_MODULE_HEADER {
121 IN UINT32 ModuleHeaderSignature; ///< Module signature
122 IN CHAR8 ModuleIdentifier[8]; ///< 8 characters ID
123 IN CHAR8 ModuleVersion[12]; ///< 12 characters version
124 IN MODULE_ENTRY ModuleDispatcherPtr; ///< A pointer point to dispatcher
125 IN struct _AMD_MODULE_HEADER *NextBlockPtr; ///< Next module header link
128 #define FUNC_0 0 // bit-placed for PCI address creation
137 // SBDFO - Segment Bus Device Function Offset
138 // 31:28 Segment (4-bits)
139 // 27:20 Bus (8-bits)
140 // 19:15 Device (5-bits)
141 // 14:12 Function (3-bits)
142 // 11:00 Offset (12-bits)
145 #define MAKE_SBDFO(Seg, Bus, Dev, Fun, Off) ((((UINT32) (Seg)) << 28) | (((UINT32) (Bus)) << 20) | \
146 (((UINT32) (Dev)) << 15) | (((UINT32) (Fun)) << 12) | ((UINT32) (Off)))
148 #define ILLEGAL_SBDFO 0xFFFFFFFF
150 /// CPUID data received registers format
151 typedef struct _SB_CPUID_DATA {
152 IN OUT UINT32 EAX_Reg; ///< CPUID instruction result in EAX
153 IN OUT UINT32 EBX_Reg; ///< CPUID instruction result in EBX
154 IN OUT UINT32 ECX_Reg; ///< CPUID instruction result in ECX
155 IN OUT UINT32 EDX_Reg; ///< CPUID instruction result in EDX
159 #define COLD_RESET 2 // Cold reset
160 #define RESET_CPU 4 // Triggers a CPU reset
162 /// HT frequency for external callbacks
164 HT_FREQUENCY_200M = 0, ///< HT speed 200 for external callbacks
165 HT_FREQUENCY_400M = 2, ///< HT speed 400 for external callbacks
166 HT_FREQUENCY_600M = 4, ///< HT speed 600 for external callbacks
167 HT_FREQUENCY_800M = 5, ///< HT speed 800 for external callbacks
168 HT_FREQUENCY_1000M = 6, ///< HT speed 1000 for external callbacks
169 HT_FREQUENCY_1200M = 7, ///< HT speed 1200 for external callbacks
170 HT_FREQUENCY_1400M = 8, ///< HT speed 1400 for external callbacks
171 HT_FREQUENCY_1600M = 9, ///< HT speed 1600 for external callbacks
172 HT_FREQUENCY_1800M = 10, ///< HT speed 1800 for external callbacks
173 HT_FREQUENCY_2000M = 11, ///< HT speed 2000 for external callbacks
174 HT_FREQUENCY_2200M = 12, ///< HT speed 2200 for external callbacks
175 HT_FREQUENCY_2400M = 13, ///< HT speed 2400 for external callbacks
176 HT_FREQUENCY_2600M = 14, ///< HT speed 2600 for external callbacks
177 HT_FREQUENCY_2800M = 17, ///< HT speed 2800 for external callbacks
178 HT_FREQUENCY_3000M = 18, ///< HT speed 3000 for external callbacks
179 HT_FREQUENCY_3200M = 19 ///< HT speed 3200 for external callbacks
183 #define BIT0 0x0000000000000001ull
186 #define BIT1 0x0000000000000002ull
189 #define BIT2 0x0000000000000004ull
192 #define BIT3 0x0000000000000008ull
195 #define BIT4 0x0000000000000010ull
198 #define BIT5 0x0000000000000020ull
201 #define BIT6 0x0000000000000040ull
204 #define BIT7 0x0000000000000080ull
207 #define BIT8 0x0000000000000100ull
210 #define BIT9 0x0000000000000200ull
213 #define BIT10 0x0000000000000400ull
216 #define BIT11 0x0000000000000800ull
219 #define BIT12 0x0000000000001000ull
222 #define BIT13 0x0000000000002000ull
225 #define BIT14 0x0000000000004000ull
228 #define BIT15 0x0000000000008000ull
231 #define BIT16 0x0000000000010000ull
234 #define BIT17 0x0000000000020000ull
237 #define BIT18 0x0000000000040000ull
240 #define BIT19 0x0000000000080000ull
243 #define BIT20 0x0000000000100000ull
246 #define BIT21 0x0000000000200000ull
249 #define BIT22 0x0000000000400000ull
252 #define BIT23 0x0000000000800000ull
255 #define BIT24 0x0000000001000000ull
258 #define BIT25 0x0000000002000000ull
261 #define BIT26 0x0000000004000000ull
264 #define BIT27 0x0000000008000000ull
267 #define BIT28 0x0000000010000000ull
270 #define BIT29 0x0000000020000000ull
273 #define BIT30 0x0000000040000000ull
276 #define BIT31 0x0000000080000000ull
279 #define BIT32 0x0000000100000000ull
282 #define BIT33 0x0000000200000000ull
285 #define BIT34 0x0000000400000000ull
288 #define BIT35 0x0000000800000000ull
291 #define BIT36 0x0000001000000000ull
294 #define BIT37 0x0000002000000000ull
297 #define BIT38 0x0000004000000000ull
300 #define BIT39 0x0000008000000000ull
303 #define BIT40 0x0000010000000000ull
306 #define BIT41 0x0000020000000000ull
309 #define BIT42 0x0000040000000000ull
312 #define BIT43 0x0000080000000000ull
315 #define BIT44 0x0000100000000000ull
318 #define BIT45 0x0000200000000000ull
321 #define BIT46 0x0000400000000000ull
324 #define BIT47 0x0000800000000000ull
327 #define BIT48 0x0001000000000000ull
330 #define BIT49 0x0002000000000000ull
333 #define BIT50 0x0004000000000000ull
336 #define BIT51 0x0008000000000000ull
339 #define BIT52 0x0010000000000000ull
342 #define BIT53 0x0020000000000000ull
345 #define BIT54 0x0040000000000000ull
348 #define BIT55 0x0080000000000000ull
351 #define BIT56 0x0100000000000000ull
354 #define BIT57 0x0200000000000000ull
357 #define BIT58 0x0400000000000000ull
360 #define BIT59 0x0800000000000000ull
363 #define BIT60 0x1000000000000000ull
366 #define BIT61 0x2000000000000000ull
369 #define BIT62 0x4000000000000000ull
372 #define BIT63 0x8000000000000000ull