2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2011 Advanced Micro Devices, Inc.
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; version 2 of the License.
10 ## This program is distributed in the hope that it will be useful,
11 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
12 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 ## GNU General Public License for more details.
15 ## You should have received a copy of the GNU General Public License
16 ## along with this program; if not, write to the Free Software
17 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 config SOUTHBRIDGE_AMD_CIMX_SB900
26 if SOUTHBRIDGE_AMD_CIMX_SB900
27 config SATA_CONTROLLER_MODE
31 0x0 = Native IDE mode.
34 0x3 = Legacy IDE mode.
36 0x5 = AHCI mode as 7804 ID (AMD driver).
37 0x6 = IDE->AHCI mode as 7804 ID (AMD driver).
43 n = Disable PCI Bridge Device 14 Function 4.
44 y = Enable PCI Bridge Device 14 Function 4.
52 config BOOTBLOCK_SOUTHBRIDGE_INIT
54 default "southbridge/amd/cimx/sb900/bootblock.c"
55 endif #SOUTHBRIDGE_AMD_CIMX_SB900