projects / coreboot.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
-Change the remaining GLIU1 port 5 register names from VIP (Video Input Port)
[coreboot.git] / src / southbridge / amd / amd8132 / Kconfig
1 config SOUTHBRIDGE_AMD_AMD8132
2         bool
my coreboot WIP stuff (asus m5a99x-evo board)