3 #include <device/pci_ids.h>
5 #define PCI_DEV(BUS, DEV, FN) ( \
6 (((BUS) & 0xFFF) << 20) | \
7 (((DEV) & 0x1F) << 15) | \
10 #define PCI_ID(VENDOR_ID, DEVICE_ID) \
11 ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
13 typedef unsigned device_t;
15 static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
18 addr = (dev>>4) | where;
19 outl(0x80000000 | (addr & ~3), 0xCF8);
20 outb(value, 0xCFC + (addr & 3));
23 static void pci_write_config32(device_t dev, unsigned where, unsigned value)
26 addr = (dev>>4) | where;
27 outl(0x80000000 | (addr & ~3), 0xCF8);
31 static unsigned pci_read_config32(device_t dev, unsigned where)
34 addr = (dev>>4) | where;
35 outl(0x80000000 | (addr & ~3), 0xCF8);
39 #define PCI_DEV_INVALID (0xffffffffU)
40 static device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
43 dev = PCI_DEV(bus, 0, 0);
44 last = PCI_DEV(bus, 31, 7);
45 for(; dev <= last; dev += PCI_DEV(0,0,1)) {
47 id = pci_read_config32(dev, 0);
52 return PCI_DEV_INVALID;
55 #include "../../../northbridge/amd/amdk8/reset_test.c"
63 unsigned link = get_sblk();
66 * There can only be one 8111 on a hypertransport chain/bus.
68 bus = node_link_to_bus(node, link);
69 dev = pci_locate_device_on_bus(
70 PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA),
75 pci_write_config8(dev, 0x47, 1);