8a648e8d375e9f1144f10b4ff10dd8d0d50bfc42
[coreboot.git] / src / southbridge / amd / amd8111 / amd8111_early_ctrl.c
1 /* by yhlu 2005.10 */
2 static void hard_reset(struct sys_info *sysinfo)
3 {
4         device_t dev;
5         
6         /* Find the device */
7         dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 3);
8
9         set_bios_reset();
10
11         /* enable cf9 */
12         pci_write_config8(dev, 0x41, 0xf1);
13         /* reset */
14         outb(0x0e, 0x0cf9);
15 }
16
17 static void enable_fid_change_on_sb(struct sys_info *sysinfo)
18 {
19         device_t dev;
20         /* Find the device */
21         dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 3);
22
23         pci_write_config8(dev, 0x74, 4);
24
25         /* set VFSMAF ( VID/FID System Management Action Field) to 2 */
26         pci_write_config32(dev, 0x70, 2<<12);
27
28 }
29
30 static void soft_reset(struct sys_info *sysinfo)
31 {
32         device_t dev;
33         
34         /* Find the device */
35         dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 0);
36
37         set_bios_reset();
38         pci_write_config8(dev, 0x47, 1);
39 }
40
41