1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/pci.h>
4 #include <device/pci_ids.h>
5 #include <device/chip.h>
8 void amd8111_enable(device_t dev)
13 uint16_t reg_old, reg;
16 /* See if we are on the behind the amd8111 pci bridge */
17 bus_dev = dev->bus->dev;
18 if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) &&
19 (bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) {
21 devfn = bus_dev->path.u.pci.devfn + (1 << 3);
22 lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
23 index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
26 devfn = (dev->path.u.pci.devfn) & ~7;
27 lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
28 index = dev->path.u.pci.devfn & 7;
31 if ((!lpc_dev) || (index >= 16)) {
34 if ((lpc_dev->vendor != PCI_VENDOR_ID_AMD) ||
35 (lpc_dev->device != PCI_DEVICE_ID_AMD_8111_ISA)) {
37 id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
38 if (id != (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8111_ISA << 16))) {
43 if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
44 (dev->device == PCI_DEVICE_ID_AMD_8111_USB2)) {
46 byte = pci_read_config8(lpc_dev, 0x47);
48 pci_write_config8(lpc_dev, 0x47, byte);
54 reg = reg_old = pci_read_config16(lpc_dev, 0x48);
60 pci_write_config16(lpc_dev, 0x48, reg);
65 struct chip_control southbridge_amd_amd8111_control = {
66 .name = "AMD 8111 Southbridge",
67 .enable_dev = amd8111_enable,