Disable AMD8111 USB2 and remove hard code addr in amd8111 IDE
[coreboot.git] / src / southbridge / amd / amd8111 / amd8111.c
1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/pci.h>
4 #include <device/pci_ids.h>
5 #include <device/chip.h>
6 #include "amd8111.h"
7
8 void amd8111_enable(device_t dev)
9 {
10         device_t lpc_dev;
11         device_t bus_dev;
12         unsigned index;
13         uint16_t reg_old, reg;
14         uint8_t byte;
15
16         /* See if we are on the behind the amd8111 pci bridge */
17         bus_dev = dev->bus->dev;
18         if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) && 
19             (bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) {
20                 unsigned devfn;
21                 devfn = bus_dev->path.u.pci.devfn + (1 << 3);
22                 lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
23                 index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
24         } else {
25                 unsigned devfn;
26                 devfn = (dev->path.u.pci.devfn) & ~7;
27                 lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
28                 index = dev->path.u.pci.devfn & 7;
29         }
30
31         if ((!lpc_dev) || (index >= 16)) {
32                 return;
33         }
34         if ((lpc_dev->vendor != PCI_VENDOR_ID_AMD) ||
35             (lpc_dev->device != PCI_DEVICE_ID_AMD_8111_ISA)) {
36                 uint32_t id;
37                 id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
38                 if (id != (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8111_ISA << 16))) {
39                         return;
40                 }
41         }
42
43         if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
44             (dev->device == PCI_DEVICE_ID_AMD_8111_USB2)) {
45                 if(!dev->enabled) {
46                         byte = pci_read_config8(lpc_dev, 0x47);
47                         byte |= (1<<7);
48                         pci_write_config8(lpc_dev, 0x47, byte);
49                         return;
50                 }
51                 
52         }
53         
54         reg = reg_old = pci_read_config16(lpc_dev, 0x48);
55         reg &= ~(1 << index);
56         if (dev->enabled) {
57                 reg |= (1 << index);
58         }
59         if (reg != reg_old) {
60                 pci_write_config16(lpc_dev, 0x48, reg);
61         }
62         
63 }
64
65 struct chip_control southbridge_amd_amd8111_control = {
66         .name       = "AMD 8111 Southbridge",
67         .enable_dev = amd8111_enable,
68 };