2 * This file is part of the coreboot project.
4 * Copyright (C) 2000 AG Electronics Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 extern void ppc_init_float_registers(const double *);
25 /*RODATA static const double dummy_float = 1.0;*/
26 static const double dummy_float = 1.0;
28 #define HID0_DCACHE HID0_DCE
29 #define MSR_DATA MSR_DR
31 void ppc_setup_cpu(int icache)
33 int type = ppc_getpvr() >> 16;
34 int version = ppc_getpvr() & 0xffff;
38 if (version == 0x0200)
39 ppc_set1015(0x19000004);
40 else if (((version & 0xff00) == 0x0200) &&
42 ppc_set1015(0x01000000);
46 ppc_sethid0(HID0_NHR | HID0_BHT | HID0_ICE | HID0_ICFI
47 | HID0_BTIC | HID0_DCACHE);
48 ppc_sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_ICE
49 | HID0_BTIC | HID0_DCACHE);
53 ppc_sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_BTIC
57 /* if (type == 8 || type == 12) */
59 ppc_setmsr(MSR_FP | MSR_DATA);
60 ppc_init_float_registers(&dummy_float);
65 void ppc_enable_dcache(void)
68 * Already enabled in crt0.S
71 unsigned hid0 = ppc_gethid0();
72 ppc_sethid0(hid0 | HID0_DCFI | HID0_DCE);
73 ppc_sethid0(hid0 | HID0_DCE);
77 void ppc_disable_dcache(void)
79 unsigned hid0 = ppc_gethid0();
80 ppc_sethid0(hid0 & ~HID0_DCE);
83 void ppc_enable_mmu(void)
85 unsigned msr = ppc_getmsr();
86 ppc_setmsr(msr | MSR_DR | MSR_IR);
89 void make_coherent(void *base, unsigned length)
91 unsigned hid0 = ppc_gethid0();
96 unsigned offset = 0x1f & (unsigned) base;
97 unsigned adjusted_base = (unsigned) base & ~0x1f;
98 for(i = 0; i < length + offset; i+= 32)
99 __asm__ volatile ("dcbf %1,%0" : : "r" (adjusted_base), "r" (i));
101 for(i = 0; i < length + offset; i+= 32)
102 __asm__ volatile ("icbi %1,%0" : : "r" (adjusted_base), "r" (i));