1 // PCI config space access functions.
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
8 #include "pci.h" // pci_config_writel
9 #include "ioport.h" // outl
10 #include "util.h" // dprintf
11 #include "config.h" // CONFIG_*
12 #include "farptr.h" // CONFIG_*
13 #include "pci_regs.h" // PCI_VENDOR_ID
14 #include "pci_ids.h" // PCI_CLASS_DISPLAY_VGA
16 void pci_config_writel(u16 bdf, u32 addr, u32 val)
18 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
19 outl(val, PORT_PCI_DATA);
22 void pci_config_writew(u16 bdf, u32 addr, u16 val)
24 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
25 outw(val, PORT_PCI_DATA + (addr & 2));
28 void pci_config_writeb(u16 bdf, u32 addr, u8 val)
30 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
31 outb(val, PORT_PCI_DATA + (addr & 3));
34 u32 pci_config_readl(u16 bdf, u32 addr)
36 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
37 return inl(PORT_PCI_DATA);
40 u16 pci_config_readw(u16 bdf, u32 addr)
42 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
43 return inw(PORT_PCI_DATA + (addr & 2));
46 u8 pci_config_readb(u16 bdf, u32 addr)
48 outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD);
49 return inb(PORT_PCI_DATA + (addr & 3));
53 pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on)
55 u16 val = pci_config_readw(bdf, addr);
56 val = (val & ~off) | on;
57 pci_config_writew(bdf, addr, val);
60 // Helper function for foreachbdf() macro - return next device
62 pci_next(int bdf, int *pmax)
64 if (pci_bdf_to_fn(bdf) == 1
65 && (pci_config_readb(bdf-1, PCI_HEADER_TYPE) & 0x80) == 0)
66 // Last found device wasn't a multi-function device - skip to
73 if (CONFIG_PCI_ROOT1 && bdf <= (CONFIG_PCI_ROOT1 << 8))
74 bdf = CONFIG_PCI_ROOT1 << 8;
75 else if (CONFIG_PCI_ROOT2 && bdf <= (CONFIG_PCI_ROOT2 << 8))
76 bdf = CONFIG_PCI_ROOT2 << 8;
79 *pmax = max = bdf + 0x0100;
82 u16 v = pci_config_readw(bdf, PCI_VENDOR_ID);
83 if (v != 0x0000 && v != 0xffff)
87 if (pci_bdf_to_fn(bdf) == 0)
93 // Check if found device is a bridge.
94 u32 v = pci_config_readb(bdf, PCI_HEADER_TYPE);
96 if (v == PCI_HEADER_TYPE_BRIDGE || v == PCI_HEADER_TYPE_CARDBUS) {
97 v = pci_config_readl(bdf, PCI_PRIMARY_BUS);
98 int newmax = (v & 0xff00) + 0x0100;
106 struct pci_device *PCIDevices;
113 struct pci_device *busdevs[256];
114 memset(busdevs, 0, sizeof(busdevs));
116 struct pci_device **pprev = &PCIDevices;
119 foreachbdf(bdf, max) {
120 // Create new pci_device struct and add to list.
121 struct pci_device *dev = malloc_tmp(sizeof(*dev));
126 memset(dev, 0, sizeof(*dev));
130 // Find parent device.
131 u8 bus = pci_bdf_to_bus(bdf), rootbus;
132 struct pci_device *parent = busdevs[bus];
139 rootbus = parent->rootbus;
144 // Populate pci_device info.
146 dev->parent = parent;
147 dev->rootbus = rootbus;
148 u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID);
149 dev->vendor = vendev & 0xffff;
150 dev->device = vendev >> 16;
151 u32 classrev = pci_config_readl(bdf, PCI_CLASS_REVISION);
152 dev->class = classrev >> 16;
153 dev->prog_if = classrev >> 8;
154 dev->revision = classrev & 0xff;
155 dev->header_type = pci_config_readb(bdf, PCI_HEADER_TYPE);
156 u8 v = dev->header_type & 0x7f;
157 if (v == PCI_HEADER_TYPE_BRIDGE || v == PCI_HEADER_TYPE_CARDBUS) {
158 u8 secbus = pci_config_readb(bdf, PCI_SECONDARY_BUS);
159 dev->secondary_bus = secbus;
160 if (secbus > bus && !busdevs[secbus])
161 busdevs[secbus] = dev;
166 // Find a vga device with legacy address decoding enabled.
170 int bdf = 0x0000, max = 0x0100;
173 if (CONFIG_PCI_ROOT1 && bdf <= (CONFIG_PCI_ROOT1 << 8))
174 bdf = CONFIG_PCI_ROOT1 << 8;
175 else if (CONFIG_PCI_ROOT2 && bdf <= (CONFIG_PCI_ROOT2 << 8))
176 bdf = CONFIG_PCI_ROOT2 << 8;
182 u16 cls = pci_config_readw(bdf, PCI_CLASS_DEVICE);
183 if (cls == 0x0000 || cls == 0xffff) {
184 // Device not present.
185 if (pci_bdf_to_fn(bdf) == 0)
191 if (cls == PCI_CLASS_DISPLAY_VGA) {
192 u16 cmd = pci_config_readw(bdf, PCI_COMMAND);
193 if (cmd & PCI_COMMAND_IO && cmd & PCI_COMMAND_MEMORY)
194 // Found active vga card
198 // Check if device is a bridge.
199 u8 hdr = pci_config_readb(bdf, PCI_HEADER_TYPE);
201 if (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS) {
202 u32 ctrl = pci_config_readb(bdf, PCI_BRIDGE_CONTROL);
203 if (ctrl & PCI_BRIDGE_CTL_VGA) {
204 // Found a VGA enabled bridge.
205 u32 pbus = pci_config_readl(bdf, PCI_PRIMARY_BUS);
206 bdf = (pbus & 0xff00);
212 if (pci_bdf_to_fn(bdf) == 0 && (hdr & 0x80) == 0)
213 // Last found device wasn't a multi-function device - skip to
221 // Search for a device with the specified vendor and device ids.
223 pci_find_device(u16 vendid, u16 devid)
225 u32 id = (devid << 16) | vendid;
227 foreachbdf(bdf, max) {
228 u32 v = pci_config_readl(bdf, PCI_VENDOR_ID);
235 // Search for a device with the specified class id.
237 pci_find_class(u16 classid)
240 foreachbdf(bdf, max) {
241 u16 v = pci_config_readw(bdf, PCI_CLASS_DEVICE);
250 // Build the PCI path designations.
254 PCIpaths = malloc_tmp(sizeof(*PCIpaths) * 256);
257 memset(PCIpaths, 0, sizeof(*PCIpaths) * 256);
261 foreachbdf(bdf, max) {
262 int bus = pci_bdf_to_bus(bdf);
264 PCIpaths[bus] = (roots++) | PP_ROOT;
266 // Check if found device is a bridge.
267 u32 v = pci_config_readb(bdf, PCI_HEADER_TYPE);
269 if (v == PCI_HEADER_TYPE_BRIDGE || v == PCI_HEADER_TYPE_CARDBUS) {
270 v = pci_config_readl(bdf, PCI_PRIMARY_BUS);
271 int childbus = (v >> 8) & 0xff;
273 PCIpaths[childbus] = bdf | PP_PCIBRIDGE;
278 int pci_init_device(const struct pci_device_id *ids, u16 bdf, void *arg)
280 u16 vendor_id = pci_config_readw(bdf, PCI_VENDOR_ID);
281 u16 device_id = pci_config_readw(bdf, PCI_DEVICE_ID);
282 u16 class = pci_config_readw(bdf, PCI_CLASS_DEVICE);
284 while (ids->vendid || ids->class_mask) {
285 if ((ids->vendid == PCI_ANY_ID || ids->vendid == vendor_id) &&
286 (ids->devid == PCI_ANY_ID || ids->devid == device_id) &&
287 !((ids->class ^ class) & ids->class_mask)) {
298 int pci_find_init_device(const struct pci_device_id *ids, void *arg)
302 foreachbdf(bdf, max) {
303 if (pci_init_device(ids, bdf, arg) == 0) {
313 u8 v = inb(PORT_PCI_REBOOT) & ~6;
314 outb(v|2, PORT_PCI_REBOOT); /* Request hard reset */
316 outb(v|6, PORT_PCI_REBOOT); /* Actually do the reset */
320 // helper functions to access pci mmio bars from real mode
323 pci_readl_32(u32 addr)
325 dprintf(3, "32: pci read : %x\n", addr);
326 return readl((void*)addr);
329 u32 pci_readl(u32 addr)
332 dprintf(3, "16: pci read : %x\n", addr);
333 extern void _cfunc32flat_pci_readl_32(u32 addr);
334 return call32(_cfunc32flat_pci_readl_32, addr, -1);
336 return pci_readl_32(addr);
346 pci_writel_32(struct reg32 *reg32)
348 dprintf(3, "32: pci write: %x, %x (%p)\n", reg32->addr, reg32->data, reg32);
349 writel((void*)(reg32->addr), reg32->data);
352 void pci_writel(u32 addr, u32 val)
354 struct reg32 reg32 = { .addr = addr, .data = val };
356 dprintf(3, "16: pci write: %x, %x (%x:%p)\n",
357 reg32.addr, reg32.data, GET_SEG(SS), ®32);
358 void *flatptr = MAKE_FLATPTR(GET_SEG(SS), ®32);
359 extern void _cfunc32flat_pci_writel_32(struct reg32 *reg32);
360 call32(_cfunc32flat_pci_writel_32, (u32)flatptr, -1);
362 pci_writel_32(®32);