1 #include <part/fallback_boot.h>
5 #define TTYS0_BASE 0x3f8
9 #define TTYS0_BAUD 115200
12 #if ((115200%TTYS0_BAUD) != 0)
13 #error Bad ttys0 baud rate
16 #define TTYS0_DIV (115200/TTYS0_BAUD)
18 /* Line Control Settings */
20 /* Set 8bit, 1 stop bit, no parity */
24 #define UART_LCS TTYS0_LCS
44 static int uart_can_tx_byte(void)
46 return inb(TTYS0_BASE + UART_LSR) & 0x20;
49 static void uart_wait_to_tx_byte(void)
51 while(!uart_can_tx_byte())
55 static void uart_wait_until_sent(void)
57 while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
61 static void uart_tx_byte(unsigned char data)
63 uart_wait_to_tx_byte();
64 outb(data, TTYS0_BASE + UART_TBR);
65 /* Make certain the data clears the fifos */
66 uart_wait_until_sent();
69 static void uart_init(void)
71 /* disable interrupts */
72 outb(0x0, TTYS0_BASE + UART_IER);
74 outb(0x01, TTYS0_BASE + UART_FCR);
75 /* Set Baud Rate Divisor to 12 ==> 115200 Baud */
76 outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
77 #if 0 && USE_OPTION_TABLE == 1
79 static const unsigned char divisor[] = { 1,2,3,6,12,24,48,96 };
80 unsigned ttys0_div, ttys0_index;
81 outb(RTC_BOOT_BYTE + 1, 0x70);
82 ttys0_index = inb(0x71);
84 ttys0_div = divisor[ttys0_index];
85 outb(ttys0_div & 0xff, TTYS0_BASE + UART_DLL);
86 outb(0, TTYS0_BASE + UART_DLM);
89 outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
90 outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
92 outb(UART_LCS, TTYS0_BASE + UART_LCR);