2 * This file is part of the coreboot project.
4 * Copyright (C) 2009 One Laptop per Child, Association, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 * Enable the serial devices on the VIA
23 #include <arch/romcc_io.h>
25 /* The base address is 0x15c, 0x2e, depending on config bytes */
27 #define SIO_BASE 0x3f0
28 #define SIO_DATA SIO_BASE+1
30 static void vx800_writesuper(uint8_t reg, uint8_t val)
36 static void vx800_writepnpaddr(uint8_t val)
42 static void vx800_writepnpdata(uint8_t val)
48 static void vx800_writesiobyte(uint16_t reg, uint8_t val)
53 static void vx800_writesioword(uint16_t reg, uint16_t val)
58 /* regs we use: 85, and the southbridge devfn is defined by the
62 static void enable_vx800_serial(void)
67 //pci_write_config8(PCI_DEV(0,17,0),0xb4,0x7e);
68 //pci_write_config8(PCI_DEV(0,17,0),0xb0,0x10);
71 vx800_writepnpaddr(0x87);
72 vx800_writepnpaddr(0x87);
73 // now go ahead and set up com1.
75 vx800_writepnpaddr(0x7);
76 vx800_writepnpdata(0x2);
78 vx800_writepnpaddr(0x30);
79 vx800_writepnpdata(0x1);
80 // serial port 1 base address (FEh)
81 vx800_writepnpaddr(0x60);
82 vx800_writepnpdata(0xfe);
83 // serial port 1 IRQ (04h)
84 vx800_writepnpaddr(0x70);
85 vx800_writepnpdata(0x4);
86 // serial port 1 control
87 vx800_writepnpaddr(0xf0);
88 vx800_writepnpdata(0x2);
90 vx800_writepnpaddr(0xaa);
92 // set up reg to set baud rate.
93 vx800_writesiobyte(0x3fb, 0x80);
95 vx800_writesioword(0x3f8, 1);
97 // WRITESIOWORD(0x3f8, 12)
98 // now set no parity, one stop, 8 bits
99 vx800_writesiobyte(0x3fb, 3);
100 // now turn on RTS, DRT
101 vx800_writesiobyte(0x3fc, 3);
103 vx800_writesiobyte(0x3f9, 0xf);
104 // should be done. Dump a char for fun.
105 vx800_writesiobyte(0x3f8, 48);