2 * This file is part of the coreboot project.
4 * Copyright (C) 2009 One Laptop per Child, Association, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr);
21 void SetDQSOutputCHB(DRAM_SYS_ATTR * DramAttr);
23 /*===================================================================
24 Function : DRAMDQSOutputSearchCHA()
27 DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
30 Purpose : set DQS output delay register reg70 and DQ output delay register reg71
31 ===================================================================*/
35 void DRAMDQSOutputSearch(DRAM_SYS_ATTR * DramAttr)
37 if (DramAttr->RankNumChA > 0)
38 SetDQSOutputCHA(DramAttr);
41 /*===================================================================
42 Function : SetDQSOutputCHA()
45 DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
48 Purpose : according the frequence set CHA DQS output
49 ===================================================================*/
50 void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr)
55 if (DramAttr->DramFreq == DIMMFREQ_400)
57 else if (DramAttr->DramFreq == DIMMFREQ_533)
59 else if (DramAttr->DramFreq == DIMMFREQ_667)
61 else if (DramAttr->DramFreq == DIMMFREQ_800)
66 if (DramAttr->RankNumChA > 2) {
67 Reg70 = Fixed_DQSA_3_4_Rank_Table[Index][0];
68 Reg71 = Fixed_DQSA_3_4_Rank_Table[Index][1];
70 Reg70 = Fixed_DQSA_1_2_Rank_Table[Index][0];
71 Reg71 = Fixed_DQSA_1_2_Rank_Table[Index][1];
73 pci_write_config8(MEMCTRL, 0x70, Reg70);
74 pci_write_config8(MEMCTRL, 0x71, Reg71);
81 /*===================================================================
82 Function : DRAMDQSInputSearch()
85 DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
88 Purpose : search DQS input delay for CHA/CHB
89 ===================================================================*/
91 void DRAMDQSInputSearch(DRAM_SYS_ATTR * DramAttr)
96 pci_write_config8(MEMCTRL, 0x77, Data);