src/northbridge/via/vt8623/vga.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <console/console.h>
  21 #include <arch/io.h>
  22 #include <stdint.h>
  23 #include <device/device.h>
  24 #include <device/pci.h>
  25 #include <device/pci_ids.h>
  26 #include <stdlib.h>
  27 #include <string.h>
  28 #include <bitops.h>
  29 #include <cpu/cpu.h>
  30 #include <cpu/x86/mtrr.h>
  31 #include <cpu/x86/msr.h>
  32 #include <arch/interrupt.h>
  33 #include "chip.h"
  34 #include "northbridge.h"
  35
  36 static int via_vt8623_int15_handler(struct eregs *regs)
  37 {
  38         int res=-1;
  39         printk(BIOS_DEBUG, "via_vt8623_int15_handler\n");
  40         switch(regs->eax & 0xffff) {
  41         case 0x5f19:
  42                 break;
  43         case 0x5f18:
  44                 regs->eax=0x5f;
  45                 regs->ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory
  46                 regs->ecx=0x060;
  47                 res=0;
  48                 break;
  49         case 0x5f00:
  50                 regs->eax = 0x8600;
  51                 break;
  52         case 0x5f01:
  53                 regs->eax = 0x5f;
  54                 regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type =  2 = 1024 * 768
  55                 res = 0;
  56                 break;
  57         case 0x5f02:
  58                 regs->eax=0x5f;
  59                 regs->ebx= (regs->ebx & 0xffff0000) | 2;
  60                 regs->ecx= (regs->ecx & 0xffff0000) | 0x401;  // PAL + crt only
  61                 regs->edx= (regs->edx & 0xffff0000) | 0;  // TV Layout - default
  62                 res=0;
  63                 break;
  64         case 0x5f0f:
  65                 regs->eax=0x860f;
  66                 break;
  67         default:
  68                 printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
  69                                 regs->eax & 0xffff);
  70                 break;
  71         }
  72         return res;
  73 }
  74
  75 #ifdef UNUSED_CODE
  76 static void write_protect_vgabios(void)
  77 {
  78         device_t dev;
  79
  80         printk(BIOS_DEBUG, "write_protect_vgabios\n");
  81
  82         dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
  83         if (dev)
  84                 pci_write_config8(dev, 0x61, 0xaa);
  85
  86         dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
  87         if (dev)
  88                 pci_write_config8(dev, 0x61, 0xaa);
  89 }
  90 #endif
  91
  92 static void vga_random_fixup(device_t dev)
  93 {
  94         printk(BIOS_DEBUG, "VGA random fixup ...\n");
  95         pci_write_config8(dev, 0x04, 0x07);
  96         pci_write_config8(dev, 0x0d, 0x20);
  97         pci_write_config32(dev,0x10,0xd8000008);
  98         pci_write_config32(dev,0x14,0xdc000000);
  99 }
 100
 101 static void vga_enable_console(void)
 102 {
 103         /* Call VGA BIOS int10 function 0x4f14 to enable main console
 104          * Epia-M does not always autosense the main console so forcing
 105          * it on is good.
 106          */
 107
 108         /*                 int#,    EAX,    EBX,    ECX,    EDX,    ESI,    EDI */
 109         realmode_interrupt(0x10, 0x4f1f, 0x8003, 0x0001, 0x0000, 0x0000, 0x0000);
 110 }
 111
 112 static void vga_init(device_t dev)
 113 {
 114         vga_random_fixup(dev);
 115
 116         mainboard_interrupt_handlers(0x15, &via_vt8623_int15_handler);
 117
 118 #ifdef MEASURE_VGA_INIT_TIME
 119         msr_t clocks1, clocks2, instructions, setup;
 120
 121         // set up performnce counters for debugging vga init sequence
 122         setup.lo = 0x1c0; // count instructions
 123         wrmsr(0x187,setup);
 124         instructions.hi = 0;
 125         instructions.lo = 0;
 126         wrmsr(0xc2,instructions);
 127         clocks1 = rdmsr(0x10);
 128 #endif
 129         printk(BIOS_DEBUG, "Initializing VGA...\n");
 130
 131         pci_dev_init(dev);
 132
 133         printk(BIOS_DEBUG, "Enable VGA console\n");
 134         vga_enable_console();
 135
 136 #ifdef MEASURE_VGA_INIT_TIME
 137         clocks2 = rdmsr(0x10);
 138         instructions = rdmsr(0xc2);
 139
 140         printk(BIOS_DEBUG, "Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
 141         printk(BIOS_DEBUG, "Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
 142         printk(BIOS_DEBUG, "Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
 143 #endif
 144
 145         pci_write_config32(dev, 0x30, 0);
 146
 147 #if 0
 148         /* Set the vga mtrrs - disable for the moment as the add_var_mtrr function has vapourised */
 149         unsigned long fb;
 150         add_var_mtrr( 0xd0000000 >> 10, 0x08000000>>10, MTRR_TYPE_WRCOMB);
 151         fb = pci_read_config32(dev,0x10); // get the fb address
 152         add_var_mtrr( fb>>10, 8192, MTRR_TYPE_WRCOMB);
 153 #endif
 154 }
 155
 156 static struct device_operations vga_operations = {
 157         .read_resources = pci_dev_read_resources,
 158         .set_resources = pci_dev_set_resources,
 159         .enable_resources = pci_dev_enable_resources,
 160         .init = vga_init,
 161         .ops_pci = 0,
 162 };
 163
 164 static const struct pci_driver vga_driver __pci_driver = {
 165         .ops = &vga_operations,
 166         .vendor = PCI_VENDOR_ID_VIA,
 167         .device = 0x3122,
 168 };