src/northbridge/via/vt8623/northbridge.c

   1 #include <console/console.h>
   2 #include <arch/io.h>
   3 #include <stdint.h>
   4 #include <device/device.h>
   5 #include <device/pci.h>
   6 #include <device/hypertransport.h>
   7 #include <device/pci_ids.h>
   8 #include <stdlib.h>
   9 #include <string.h>
  10 #include <bitops.h>
  11 #include <cpu/cpu.h>
  12 #include <cpu/x86/mtrr.h>
  13 #include "chip.h"
  14 #include "northbridge.h"
  15
  16 /*
  17  * This fixup is based on capturing values from an Award bios.  Without
  18  * this fixup the DMA write performance is awful (i.e. hdparm -t /dev/hda is 20x
  19  * slower than normal, ethernet drops packets).
  20  * Apparently these registers govern some sort of bus master behavior.
  21  */
  22 static void northbridge_init(device_t dev)
  23 {
  24         device_t fb_dev;
  25         unsigned long fb;
  26         unsigned char c;
  27
  28         printk_debug("VT8623 random fixup ...\n");
  29         pci_write_config8(dev,  0x0d, 0x08);
  30         pci_write_config8(dev,  0x70, 0x82);
  31         pci_write_config8(dev,  0x71, 0xc8);
  32         pci_write_config8(dev,  0x72, 0x00);
  33         pci_write_config8(dev,  0x73, 0x01);
  34         pci_write_config8(dev,  0x74, 0x01);
  35         pci_write_config8(dev,  0x75, 0x08);
  36         pci_write_config8(dev,  0x76, 0x52);
  37         pci_write_config8(dev,  0x13, 0xd0);
  38         pci_write_config8(dev,  0x84, 0x80);
  39         pci_write_config16(dev, 0x80, 0x610f);
  40         pci_write_config32(dev, 0x88, 0x00000002);
  41
  42         fb_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
  43         if (fb_dev) {
  44                 /* Fixup GART and framebuffer addresses properly.
  45                  * First setup frame buffer properly.
  46                  */
  47                 fb = pci_read_config32(dev, 0x10);       /* Base addres of framebuffer */
  48                 printk_debug("Frame buffer at %8x\n",fb);
  49
  50                 c = pci_read_config8(dev, 0xe1) & 0xf0;  /* size of vga */
  51                 c |= fb>>28;  /* upper nibble of frame buffer address */
  52                 pci_write_config8(dev, 0xe1, c);
  53                 c = (fb>>20) | 1;                        /* enable framebuffer */
  54                 pci_write_config8(dev, 0xe0, c);
  55                 pci_write_config8(dev, 0xe2, 0x42);      /* 'cos award does */
  56         }
  57 }
  58
  59
  60 static struct device_operations northbridge_operations = {
  61         .read_resources   = pci_dev_read_resources,
  62         .set_resources    = pci_dev_set_resources,
  63         .enable_resources = pci_dev_enable_resources,
  64         .init             = northbridge_init
  65 };
  66
  67 static struct pci_driver northbridge_driver __pci_driver = {
  68         .ops = &northbridge_operations,
  69         .vendor = PCI_VENDOR_ID_VIA,
  70         .device = PCI_DEVICE_ID_VIA_8623,
  71 };
  72
  73 static void agp_init(device_t dev)
  74 {
  75         printk_debug("VT8623 AGP random fixup ...\n");
  76
  77         pci_write_config8(dev, 0x3e, 0x0c);
  78         pci_write_config8(dev, 0x40, 0x83);
  79         pci_write_config8(dev, 0x41, 0xc5);
  80         pci_write_config8(dev, 0x43, 0x44);
  81         pci_write_config8(dev, 0x44, 0x34);
  82         pci_write_config8(dev, 0x83, 0x02);
  83 }
  84
  85 static struct device_operations agp_operations = {
  86         .read_resources   = pci_bus_read_resources,
  87         .set_resources    = pci_dev_set_resources,
  88         .enable_resources = pci_bus_enable_resources,
  89         .init             = agp_init,
  90         .scan_bus         = pci_scan_bridge,
  91         .ops_pci          = 0,
  92 };
  93
  94 static struct pci_driver agp_driver __pci_driver = {
  95         .ops = &agp_operations,
  96         .vendor = PCI_VENDOR_ID_VIA,
  97         .device = PCI_DEVICE_ID_VIA_8633_1,
  98 };
  99
 100 static void vga_init(device_t dev)
 101 {
 102 //      unsigned long fb;
 103
 104         printk_debug("VGA random fixup ...\n");
 105         pci_write_config8(dev, 0x04, 0x07);
 106         pci_write_config8(dev, 0x0d, 0x20);
 107
 108         /* Set the vga mtrrs - disable for the moment */
 109 #if 0
 110         add_var_mtrr( 0xd0000000 >> 10, 0x08000000>>10, MTRR_TYPE_WRCOMB);
 111         fb = pci_read_config32(dev,0x10); // get the fb address
 112         add_var_mtrr( fb>>10, 8192, MTRR_TYPE_WRCOMB);
 113 #endif
 114 }
 115
 116 static struct device_operations vga_operations = {
 117         .read_resources   = pci_dev_read_resources,
 118         .set_resources    = pci_dev_set_resources,
 119         .enable_resources = pci_dev_enable_resources,
 120         .init             = vga_init,
 121         .ops_pci          = 0,
 122 };
 123
 124 static struct pci_driver vga_driver __pci_driver = {
 125         .ops = &vga_operations,
 126         .vendor = PCI_VENDOR_ID_VIA,
 127         .device = 0x3122,
 128 };
 129
 130
 131 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
 132
 133 static void pci_domain_read_resources(device_t dev)
 134 {
 135         struct resource *resource;
 136
 137         printk_spew("Entering vt8623 pci_domain_read_resources.\n");
 138
 139         /* Initialize the system wide io space constraints */
 140         resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
 141         resource->limit = 0xffffUL;
 142         resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
 143                 IORESOURCE_ASSIGNED;
 144
 145         /* Initialize the system wide memory resources constraints */
 146         resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
 147         resource->limit = 0xffffffffULL;
 148         resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
 149                 IORESOURCE_ASSIGNED;
 150
 151         printk_spew("Leaving vt8623 pci_domain_read_resources.\n");
 152 }
 153
 154 static void ram_resource(device_t dev, unsigned long index,
 155         unsigned long basek, unsigned long sizek)
 156 {
 157         struct resource *resource;
 158
 159         if (!sizek) {
 160                 return;
 161         }
 162         resource = new_resource(dev, index);
 163         resource->base  = ((resource_t)basek) << 10;
 164         resource->size  = ((resource_t)sizek) << 10;
 165         resource->flags =  IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
 166                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 167 }
 168
 169 static void tolm_test(void *gp, struct device *dev, struct resource *new)
 170 {
 171         struct resource **best_p = gp;
 172         struct resource *best;
 173         best = *best_p;
 174         if (!best || (best->base > new->base)) {
 175                 best = new;
 176         }
 177         *best_p = best;
 178 }
 179
 180 static uint32_t find_pci_tolm(struct bus *bus)
 181 {
 182         struct resource *min;
 183         uint32_t tolm;
 184         min = 0;
 185         search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
 186         tolm = 0xffffffffUL;
 187         if (min && tolm > min->base) {
 188                 tolm = min->base;
 189         }
 190         return tolm;
 191 }
 192
 193 static void pci_domain_set_resources(device_t dev)
 194 {
 195         static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d };
 196         device_t mc_dev;
 197         uint32_t pci_tolm;
 198
 199         printk_spew("Entering vt8623 pci_domain_set_resources.\n");
 200
 201         pci_tolm = find_pci_tolm(&dev->link[0]);
 202         mc_dev = dev->link[0].children;
 203         if (mc_dev) {
 204                 unsigned long tomk, tolmk;
 205                 unsigned char rambits;
 206                 int i, idx;
 207
 208                 for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) {
 209                         unsigned char reg;
 210                         reg = pci_read_config8(mc_dev, ramregs[i]);
 211                         /* these are ENDING addresses, not sizes.
 212                          * if there is memory in this slot, then reg will be > rambits.
 213                          * So we just take the max, that gives us total.
 214                          * We take the highest one to cover for once and future linuxbios
 215                          * bugs. We warn about bugs.
 216                          */
 217                         if (reg > rambits)
 218                                 rambits = reg;
 219                         if (reg < rambits)
 220                                 printk_err("ERROR! register 0x%x is not set!\n",
 221                                         ramregs[i]);
 222                 }
 223                 printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024);
 224                 tomk = rambits*16*1024 - 32768;
 225                 /* Compute the top of Low memory */
 226                 tolmk = pci_tolm >> 10;
 227                 if (tolmk >= tomk) {
 228                         /* The PCI hole does does not overlap the memory.
 229                          */
 230                         tolmk = tomk;
 231                 }
 232                 /* Report the memory regions */
 233                 idx = 10;
 234                 ram_resource(dev, idx++, 0, 640);               /* first 640k */
 235                 ram_resource(dev, idx++, 768, tolmk - 768);     /* leave a hole for vga */
 236         }
 237         assign_resources(&dev->link[0]);
 238 }
 239
 240 static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
 241 {
 242         printk_spew("Entering vt8623 pci_domain_scan_bus.\n");
 243
 244         max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
 245         return max;
 246 }
 247
 248 static struct device_operations pci_domain_ops = {
 249         .read_resources   = pci_domain_read_resources,
 250         .set_resources    = pci_domain_set_resources,
 251         .enable_resources = enable_childrens_resources,
 252         .init             = 0,
 253         .scan_bus         = pci_domain_scan_bus,
 254 };
 255
 256 static void cpu_bus_init(device_t dev)
 257 {
 258         initialize_cpus(&dev->link[0]);
 259 }
 260
 261 static void cpu_bus_noop(device_t dev)
 262 {
 263 }
 264
 265 static struct device_operations cpu_bus_ops = {
 266         .read_resources   = cpu_bus_noop,
 267         .set_resources    = cpu_bus_noop,
 268         .enable_resources = cpu_bus_noop,
 269         .init             = cpu_bus_init,
 270         .scan_bus         = 0,
 271 };
 272
 273 static void enable_dev(struct device *dev)
 274 {
 275         printk_spew("In vt8623 enable_dev for device %s.\n", dev_path(dev));
 276
 277         /* Set the operations if it is a special bus type */
 278         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
 279                 dev->ops = &pci_domain_ops;
 280                 pci_set_method(dev);
 281         }
 282         else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
 283                 dev->ops = &cpu_bus_ops;
 284         }
 285 }
 286
 287 struct chip_operations northbridge_via_vt8623_ops = {
 288         CHIP_NAME("VIA vt8623 Northbridge")
 289         .enable_dev = enable_dev,
 290 };