1 #include <console/console.h>
5 #include <part/sizeram.h>
6 #include <device/device.h>
7 #include <device/pci.h>
8 #include <device/hypertransport.h>
13 #include "northbridge.h"
15 static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
18 struct mem_range *sizeram(void)
20 unsigned long mmio_basek;
21 static struct mem_range mem[10];
24 unsigned char rambits;
26 dev = dev_find_slot(0, 0);
28 printk_err("Cannot find PCI: 0:0\n");
34 while(idx < sizeof(mem)/sizeof(mem[0])) {
39 for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) {
41 reg = pci_read_config8(dev, ramregs[i]);
42 /* these are ENDING addresses, not sizes.
43 * if there is memory in this slot, then reg will be > rambits.
44 * So we just take the max, that gives us total.
45 * We take the highest one to cover for once and future linuxbios
46 * bugs. We warn about bugs.
51 printk_err("ERROR! register 0x%x is not set!\n",
55 printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
56 mem[0].sizek = rambits*8*1024;
58 for(i = 0; i < idx; i++) {
59 printk_debug("mem[%d].basek = %08x mem[%d].sizek = %08x\n",
60 i, mem[i].basek, i, mem[i].sizek);
66 static void enumerate(struct chip *chip)
68 extern struct device_operations default_pci_ops_bus;
70 chip->dev->ops = &default_pci_ops_bus;
74 * This fixup is based on capturing values from an Award bios. Without
75 * this fixup the DMA write performance is awful (i.e. hdparm -t /dev/hda is 20x
76 * slower than normal, ethernet drops packets).
77 * Apparently these registers govern some sort of bus master behavior.
79 static void random_fixup() {
80 device_t pcidev = dev_find_slot(0, 0);
82 printk_spew("VT8601 random fixup ...\n");
84 pci_write_config8(pcidev, 0x70, 0xc0);
85 pci_write_config8(pcidev, 0x71, 0x88);
86 pci_write_config8(pcidev, 0x72, 0xec);
87 pci_write_config8(pcidev, 0x73, 0x0c);
88 pci_write_config8(pcidev, 0x74, 0x0e);
89 pci_write_config8(pcidev, 0x75, 0x81);
90 pci_write_config8(pcidev, 0x76, 0x52);
94 static void northbridge_init(struct chip *chip, enum chip_pass pass)
97 struct northbridge_via_vt8601_config *conf =
98 (struct northbridge_via_vt8601_config *)chip->chip_info;
101 case CONF_PASS_PRE_PCI:
104 case CONF_PASS_POST_PCI:
107 case CONF_PASS_PRE_BOOT:
117 struct chip_control northbridge_via_vt8601_control = {
118 .enumerate = enumerate,
119 .enable = northbridge_init,
120 .name = "VIA vt8601 Northbridge",