src/northbridge/intel/i440bx/northbridge.c

   1 #include <console/console.h>
   2 #include <arch/io.h>
   3 #include <stdint.h>
   4 #include <device/device.h>
   5 #include <device/pci.h>
   6 #include <device/pci_ids.h>
   7 #include <stdlib.h>
   8 #include <string.h>
   9 #include <bitops.h>
  10 #include <cpu/cpu.h>
  11 #include <pc80/keyboard.h>
  12 #include "chip.h"
  13 #include "northbridge.h"
  14 #include "i440bx.h"
  15
  16 static void northbridge_init(device_t dev)
  17 {
  18         printk_spew("Northbridge Init\n");
  19 }
  20
  21 static struct device_operations northbridge_operations = {
  22         .read_resources   = pci_dev_read_resources,
  23         .set_resources    = pci_dev_set_resources,
  24         .enable_resources = pci_dev_enable_resources,
  25         .init             = northbridge_init,
  26         .enable           = 0,
  27         .ops_pci          = 0,
  28 };
  29
  30 static const struct pci_driver northbridge_driver __pci_driver = {
  31         .ops = &northbridge_operations,
  32         .vendor = PCI_VENDOR_ID_INTEL,
  33         .device = 0x7190,
  34 };
  35
  36
  37 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
  38
  39 static void pci_domain_read_resources(device_t dev)
  40 {
  41         struct resource *resource;
  42         unsigned reg;
  43
  44         /* Initialize the system wide io space constraints */
  45         resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
  46         resource->limit = 0xffffUL;
  47         resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
  48
  49         /* Initialize the system wide memory resources constraints */
  50         resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
  51         resource->limit = 0xffffffffULL;
  52         resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
  53 }
  54
  55 static void ram_resource(device_t dev, unsigned long index,
  56         unsigned long basek, unsigned long sizek)
  57 {
  58         struct resource *resource;
  59
  60         if (!sizek) {
  61                 return;
  62         }
  63         resource = new_resource(dev, index);
  64         resource->base  = ((resource_t)basek) << 10;
  65         resource->size  = ((resource_t)sizek) << 10;
  66         resource->flags =  IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
  67                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
  68 }
  69
  70 static void tolm_test(void *gp, struct device *dev, struct resource *new)
  71 {
  72         struct resource **best_p = gp;
  73         struct resource *best;
  74         best = *best_p;
  75         if (!best || (best->base > new->base)) {
  76                 best = new;
  77         }
  78         *best_p = best;
  79 }
  80
  81 static uint32_t find_pci_tolm(struct bus *bus)
  82 {
  83         struct resource *min;
  84         uint32_t tolm;
  85         min = 0;
  86         search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
  87         tolm = 0xffffffffUL;
  88         if (min && tolm > min->base) {
  89                 tolm = min->base;
  90         }
  91         return tolm;
  92 }
  93
  94 #if HAVE_HIGH_TABLES==1
  95 #define HIGH_TABLES_SIZE 64     // maximum size of high tables in KB
  96 extern uint64_t high_tables_base, high_tables_size;
  97 #endif
  98 static void pci_domain_set_resources(device_t dev)
  99 {
 100         device_t mc_dev;
 101         uint32_t pci_tolm;
 102
 103         pci_tolm = find_pci_tolm(&dev->link[0]);
 104         mc_dev = dev->link[0].children;
 105
 106         if (mc_dev) {
 107                 uint16_t tolm_r;
 108                 unsigned long tomk, tolmk;
 109                 int idx;
 110
 111                 /* Figure out which areas are/should be occupied by RAM. The
 112                  * value of the highest DRB denotes the end of the physical
 113                  * memory (in units of 8MB).
 114                  */
 115                 tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7));
 116
 117                 /* Convert to KB. */
 118                 tomk *= (8 * 1024);
 119
 120                 printk_debug("Setting RAM size to %d MB\n", tomk / 1024);
 121
 122                 /* Compute the top of low memory. */
 123                 tolmk = pci_tolm / 1024;
 124
 125                 if (tolmk >= tomk) {
 126                         /* The PCI hole does does not overlap the memory. */
 127                         tolmk = tomk;
 128                 }
 129
 130                 /* Report the memory regions. */
 131                 idx = 10;
 132                 ram_resource(dev, idx++, 0, 640);
 133                 ram_resource(dev, idx++, 768, tolmk - 768);
 134
 135 #if HAVE_HIGH_TABLES==1
 136                 /* Leave some space for ACPI, PIRQ and MP tables */
 137                 high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
 138                 high_tables_size = HIGH_TABLES_SIZE * 1024;
 139 #endif
 140         }
 141
 142         assign_resources(&dev->link[0]);
 143 }
 144
 145 static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
 146 {
 147         max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
 148         return max;
 149 }
 150
 151 static struct device_operations pci_domain_ops = {
 152         .read_resources   = pci_domain_read_resources,
 153         .set_resources    = pci_domain_set_resources,
 154         .enable_resources = enable_childrens_resources,
 155         .init             = 0,
 156         .scan_bus         = pci_domain_scan_bus,
 157 };
 158
 159 static void cpu_bus_init(device_t dev)
 160 {
 161         initialize_cpus(&dev->link[0]);
 162 }
 163
 164 static void cpu_bus_noop(device_t dev)
 165 {
 166 }
 167
 168 static struct device_operations cpu_bus_ops = {
 169         .read_resources   = cpu_bus_noop,
 170         .set_resources    = cpu_bus_noop,
 171         .enable_resources = cpu_bus_noop,
 172         .init             = cpu_bus_init,
 173         .scan_bus         = 0,
 174 };
 175
 176 static void enable_dev(struct device *dev)
 177 {
 178         struct device_path path;
 179
 180         /* Set the operations if it is a special bus type */
 181         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
 182                 dev->ops = &pci_domain_ops;
 183                 pci_set_method(dev);
 184         }
 185         else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
 186                 dev->ops = &cpu_bus_ops;
 187         }
 188 }
 189
 190 struct chip_operations northbridge_intel_i440bx_ops = {
 191         CHIP_NAME("Intel 82443BX (440BX) Northbridge")
 192         .enable_dev = enable_dev,
 193 };