1 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
11 #include <pc80/keyboard.h>
13 #include "northbridge.h"
16 static void northbridge_init(device_t dev)
18 printk(BIOS_SPEW, "Northbridge Init\n");
21 static struct device_operations northbridge_operations = {
22 .read_resources = pci_dev_read_resources,
23 .set_resources = pci_dev_set_resources,
24 .enable_resources = pci_dev_enable_resources,
25 .init = northbridge_init,
30 static const struct pci_driver northbridge_driver __pci_driver = {
31 .ops = &northbridge_operations,
32 .vendor = PCI_VENDOR_ID_INTEL,
36 #if CONFIG_WRITE_HIGH_TABLES==1
40 static void i440bx_domain_set_resources(device_t dev)
45 pci_tolm = find_pci_tolm(dev->link_list);
46 mc_dev = dev->link_list->children;
48 unsigned long tomk, tolmk;
51 /* Figure out which areas are/should be occupied by RAM. The
52 * value of the highest DRB denotes the end of the physical
53 * memory (in units of 8MB).
55 tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7));
60 printk(BIOS_DEBUG, "Setting RAM size to %ld MB\n", tomk / 1024);
62 /* Compute the top of low memory. */
63 tolmk = pci_tolm / 1024;
66 /* The PCI hole does not overlap the memory. */
70 /* Report the memory regions. */
72 ram_resource(dev, idx++, 0, 640);
73 ram_resource(dev, idx++, 768, tolmk - 768);
75 #if CONFIG_WRITE_HIGH_TABLES==1
76 /* Leave some space for ACPI, PIRQ and MP tables */
77 high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
78 high_tables_size = HIGH_MEMORY_SIZE;
81 assign_resources(dev->link_list);
84 static struct device_operations pci_domain_ops = {
85 .read_resources = pci_domain_read_resources,
86 .set_resources = i440bx_domain_set_resources,
87 .enable_resources = NULL,
89 .scan_bus = pci_domain_scan_bus,
92 static void cpu_bus_init(device_t dev)
94 initialize_cpus(dev->link_list);
97 static void cpu_bus_noop(device_t dev)
101 static struct device_operations cpu_bus_ops = {
102 .read_resources = cpu_bus_noop,
103 .set_resources = cpu_bus_noop,
104 .enable_resources = cpu_bus_noop,
105 .init = cpu_bus_init,
109 static void enable_dev(struct device *dev)
111 /* Set the operations if it is a special bus type */
112 if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
113 dev->ops = &pci_domain_ops;
116 else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
117 dev->ops = &cpu_bus_ops;
121 struct chip_operations northbridge_intel_i440bx_ops = {
122 CHIP_NAME("Intel 82443BX (440BX) Northbridge")
123 .enable_dev = enable_dev,