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Configure CIMx to use 33 MHz fast mode for SPD read.
[coreboot.git]
/
src
/
northbridge
/
intel
/
e7520
/
chip.h
1
struct northbridge_intel_e7520_config
2
{
3
/* Interrupt line connect */
4
unsigned int intrline;
5
};
6
7
extern struct chip_operations northbridge_intel_e7520_ops;