src/northbridge/amd/lx/pll_reset.c

   1 #define POST_CODE(x) outb(0x80, x)
   2
   3 static void pll_reset(void)
   4 {
   5         msr_t msrGlcpSysRstpll;
   6
   7         msrGlcpSysRstpll = rdmsr(GLCP_SYS_RSTPLL);
   8
   9         print_debug("MSR GLCP_SYS_RSTPLL (");
  10                 print_debug_hex32(GLCP_SYS_RSTPLL);
  11                 print_debug(") value is: ");
  12                 print_debug_hex32(msrGlcpSysRstpll.hi);
  13                 print_debug(":");
  14                 print_debug_hex32(msrGlcpSysRstpll.lo);
  15                 print_debug("\n");
  16
  17         msrGlcpSysRstpll.lo &= 0x80000000;
  18
  19         // If the "we've already been here" flag is set, don't reconfigure the pll
  20         if ( !(msrGlcpSysRstpll.lo) )
  21         { // we haven't configured the PLL; do it now
  22                 POST_CODE(0x77);
  23
  24                /*
  25                 *    64 - 32        |  31-0
  26                 *
  27                 *      (03FB)
  28                 * 0000 0011 1111 1011 | 1000 0000 1101 1110 0000 0000 1000 0001
  29                 *
  30                 *      (039C)
  31                 * 0000 0011 1001 1100 | 1000 0000 1101 1110 0000 0000 1000 0001
  32                 *
  33                 *       (029C)
  34                 * 0000 0010 1001 1100 | 1000 0000 1101 1110 0000 0000 1000 0001
  35                 *
  36                 *       (02CB)
  37                 * 0000 0010 1100 1011 | 1000 0000 1101 1110 0000 0000 1000 0001
  38                 *
  39                 * 00101         1                       00101           1               | 100000        0               0               11011110        0000 0000 1000 0001
  40                 * GLIUMULT      GLIUDIV         COREMULT        COREDIV | SWFLAGS       (RO)    (RO)    HOLD_COUNT
  41                 */
  42
  43                 /* ### 02CB  ###
  44                  * GLIUMULT = 6
  45                  * GLIUDIV = 2
  46                  * COREMULT = 6
  47                  * COREDIV = 2
  48                  *
  49                  * ### 03FB  ###
  50                  * GLIUMULT = 8
  51                  * GLIUDIV = 2
  52                  * COREMULT = 30
  53                  * COREDIV = 2
  54                  *
  55                  * ### 039C  ###  bad... why?
  56                  * GLIUMULT = 8
  57                  * GLIUDIV = 0
  58                  * COREMULT = 15
  59                  * COREDIV = 0
  60                  *
  61                  * ### 029C  ###  good...
  62                  * GLIUMULT = 6
  63                  * GLIUDIV = 0
  64                  * COREMULT = 15
  65                  * COREDIV = 0
  66                  *
  67                  *  CLOCK = 33 MHz
  68                  *
  69                  */
  70
  71                         /* CPU and GLIU mult/div (GLMC_CLK = GLIU_CLK / 2)  */
  72                         msrGlcpSysRstpll.hi = 0x0000029C;
  73
  74                         /* Hold Count - how long we will sit in reset */
  75                         msrGlcpSysRstpll.lo = 0x00DE0000;
  76
  77                         /* Use SWFLAGS to remember: "we've already been here"  */
  78                         msrGlcpSysRstpll.lo |= 0x80000000;
  79
  80                         /* "reset the chip" value */
  81                         msrGlcpSysRstpll.lo |= 0x00000001;
  82
  83                 wrmsr(GLCP_SYS_RSTPLL, msrGlcpSysRstpll);
  84         }
  85 }