2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Christoph Grenz <christophg+cb@grenz-bonn.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 * include this file into a mainboards DSDT inside the PCI device
22 * "K8 Miscellaneous Control" and it will expose the temperature
23 * sensors of the processor as thermal zones.
25 * If, for example, the K8 Misc. Control device is on 0:18.3, include the
26 * following inside the PCI0 device:
29 * Name (_ADR, 0x00180003)
30 * #include northbridge/amd/amdk8/thermal_mixin.asl
33 * Note: as only the current temperature and the trip temperature for
34 * "Software Thermal Control" are available in the PCI registers, but the
35 * linux driver for thermal zones needs a critical temperature value, a
36 * reasonable critical temperature is calculated by simply adding 6°C to
37 * the trip temperature.
39 * The used registers are documented in the "BIOS and Kernel Developer's
40 * Guide for AMD NPT Family 0Fh Processors"
41 * http://support.amd.com/us/Processor_TechDocs/32559.pdf
45 #ifndef K8TEMP_CRITICAL_ADD
46 # define K8TEMP_CRITICAL_ADD 6
49 OperationRegion(K8TR, PCI_Config, 0xE4, 0x4)
50 Field(K8TR, DWordAcc, NoLock, Preserve) {
52 THTP, 1, /* Temperature sensor trip occured */
53 CORE, 1, /* Select Core */
54 TTS0, 1, /* Temperature sensor trip on CPU1 (or single core CPU0) */
55 TTS1, 1, /* Temperature sensor trip on CPU0 */
56 TTEN, 1, /* Temperature sensor trip enabled */
57 PLAC, 1, /* Select Sensor */
59 DOFF, 6, /* Diode offset (signed 6bit-Integer) in °C */
60 TFRC, 2, /* Temperature fractions */
61 TVAL, 8, /* Temperature value in °C biased by -49 */
64 SWTT, 1, /* Induce a thermtrip event (for diagnostic purposes) */
67 OperationRegion(K8ST, PCI_Config, 0x70, 0x1)
68 Field(K8ST, ByteAcc, NoLock, Preserve) {
69 TMAX, 5, /* Maximum temperature for software thermal control, in °C, biased by 52 */
72 /* Calculates temperature in tenths Kelvin from given TVAL and TFRC values */
74 Divide(Multiply(Arg1, 5), 2, , Local0)
75 Return (Add(Multiply(Add(Arg0, 224),10), Local0))
78 /* Calculates the diode offset from a DOFF value */
82 Return (Multiply(Subtract(Xor(Arg0, 0x3F), 1), 10))
85 Return (Multiply(Arg0, 10))
90 Name(_HID, EisaId("PNP0C11"))
92 Name(_STR, Unicode("K8 compatible CPU Core 1 Thermal Sensor 1"))
100 If (LOr(PLAC, CORE)) {
106 If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
122 Store (K8PT(TVAL, TFRC), Local2)
123 Add (K8PO(DOFF), Local2, Local2)
131 Add(TMAX, 325, Local0)
132 Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
133 Return (Multiply(Local0, 10))
138 Name(_HID, EisaId("PNP0C11"))
140 Name(_STR, Unicode("K8 compatible CPU Core 1 Thermal Sensor 2"))
142 Name(_TZD, Package () {\_PR.CPU0})
150 If (LOr(PLAC, CORE)) {
157 If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
173 Store (K8PT(TVAL, TFRC), Local2)
174 Add (K8PO(DOFF), Local2, Local2)
182 Add(TMAX, 325, Local0)
183 Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
184 Return (Multiply(Local0, 10))
189 Name(_HID, EisaId("PNP0C11"))
191 Name(_STR, Unicode("K8 compatible CPU Core 2 Thermal Sensor 1"))
193 Name(_TZD, Package () {\_PR.CPU0})
201 If (LOr(PLAC, CORE)) {
208 If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
224 Store (K8PT(TVAL, TFRC), Local2)
225 Add (K8PO(DOFF), Local2, Local2)
233 Add(TMAX, 325, Local0)
234 Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
235 Return (Multiply(Local0, 10))
240 Name(_HID, EisaId("PNP0C11"))
242 Name(_STR, Unicode("K8 compatible CPU Core 2 Thermal Sensor 2"))
244 Name(_TZD, Package () {\_PR.CPU0})
252 If (LOr(PLAC, CORE)) {
260 If (LOr(LNot(TVAL), LEqual(TVAL, 0xFF))) {
276 Store (K8PT(TVAL, TFRC), Local2)
277 Add (K8PO(DOFF), Local2, Local2)
285 Add(TMAX, 325, Local0)
286 Add(Local0, K8TEMP_CRITICAL_ADD, Local0)
287 Return (Multiply(Local0, 10))