src/northbridge/amd/amdk8/reset_test.c

   1 #include <stdint.h>
   2 #define NODE_ID         0x60
   3 #define HT_INIT_CONTROL 0x6c
   4
   5 #define HTIC_ColdR_Detect  (1<<4)
   6 #define HTIC_BIOSR_Detect  (1<<5)
   7 #define HTIC_INIT_Detect   (1<<6)
   8
   9
  10 static int cpu_init_detected(void)
  11 {
  12         unsigned long dcl;
  13         int cpu_init;
  14
  15         unsigned long htic;
  16
  17         htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL);
  18 #if 0
  19         print_debug("htic: ");
  20         print_debug_hex32(htic);
  21         print_debug("\r\n");
  22
  23         if (!(htic & HTIC_ColdR_Detect)) {
  24                 print_debug("Cold Reset.\r\n");
  25         }
  26         if ((htic & HTIC_ColdR_Detect) && !(htic & HTIC_BIOSR_Detect)) {
  27                 print_debug("BIOS generated Reset.\r\n");
  28         }
  29         if (htic & HTIC_INIT_Detect) {
  30                 print_debug("Init event.\r\n");
  31         }
  32 #endif
  33         cpu_init = (htic & HTIC_INIT_Detect);
  34         return cpu_init;
  35 }
  36
  37 static void distinguish_cpu_resets(unsigned node_id)
  38 {
  39         uint32_t htic;
  40         device_t device;
  41         device = PCI_DEV(0, 0x18 + node_id, 0);
  42         htic = pci_read_config32(device, HT_INIT_CONTROL);
  43         htic |= HTIC_ColdR_Detect | HTIC_BIOSR_Detect | HTIC_INIT_Detect;
  44         pci_write_config32(device, HT_INIT_CONTROL, htic);
  45 }