src/northbridge/amd/amdk8/reset_test.c

   1 #include <stdint.h>
   2 #define NODE_ID         0x60
   3 #define HT_INIT_CONTROL 0x6c
   4
   5 #define HTIC_ColdR_Detect  (1<<4)
   6 #define HTIC_BIOSR_Detect  (1<<5)
   7 #define HTIC_INIT_Detect   (1<<6)
   8
   9
  10 static int cpu_init_detected(void)
  11 {
  12         unsigned long htic;
  13         htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL);
  14
  15         return !!(htic & HTIC_INIT_Detect);
  16 }
  17
  18 static int bios_reset_detected(void)
  19 {
  20         unsigned long htic;
  21         htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL);
  22
  23         return (htic & HTIC_ColdR_Detect) && !(htic & HTIC_BIOSR_Detect);
  24 }
  25
  26 static int cold_reset_detected(void)
  27 {
  28         unsigned long htic;
  29         htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL);
  30
  31         return !(htic & HTIC_ColdR_Detect);
  32 }
  33
  34 static void distinguish_cpu_resets(unsigned node_id)
  35 {
  36         uint32_t htic;
  37         device_t device;
  38         device = PCI_DEV(0, 0x18 + node_id, 0);
  39         htic = pci_read_config32(device, HT_INIT_CONTROL);
  40         htic |= HTIC_ColdR_Detect | HTIC_BIOSR_Detect | HTIC_INIT_Detect;
  41         pci_write_config32(device, HT_INIT_CONTROL, htic);
  42 }
  43
  44 static void set_bios_reset(void)
  45 {
  46         unsigned long htic;
  47         htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL);
  48         htic &= ~HTIC_BIOSR_Detect;
  49         pci_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic);
  50 }