2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 static void set_htic_bit(u8 i, u32 val, u8 bit)
25 dword = pci_read_config32(NODE_PCI(i, 0), HT_INIT_CONTROL);
27 dword |= ((val & 1) <<bit);
28 pci_write_config32(NODE_PCI(i, 0), HT_INIT_CONTROL, dword);
32 static u32 get_htic_bit(u8 i, u8 bit)
35 dword = pci_read_config32(NODE_PCI(i, 0), HT_INIT_CONTROL);
40 static void wait_till_sysinfo_in_ram(void)
43 /* give the NB a break, many CPUs spinning on one bit makes a
44 * lot of traffic and time is not too important to APs.
47 if(get_htic_bit(0, 9)) return;
52 static void set_sysinfo_in_ram(u32 val)
54 set_htic_bit(0, val, 9);
57 static void fill_mem_ctrl(u32 controllers, struct mem_controller *ctrl_a, const u8 *spd_addr)
62 struct mem_controller *ctrl;
63 for(i=0;i<controllers; i++) {
66 ctrl->f0 = NODE_PCI(i, 0);
67 ctrl->f1 = NODE_PCI(i, 1);
68 ctrl->f2 = NODE_PCI(i, 2);
69 ctrl->f3 = NODE_PCI(i, 3);
70 ctrl->f4 = NODE_PCI(i, 4);
71 ctrl->f5 = NODE_PCI(i, 5);
73 if(spd_addr == (void *)0) continue;
75 ctrl->spd_switch_addr = spd_addr[index++];
77 for(j=0; j < 8; j++) {
78 ctrl->spd_addr[j] = spd_addr[index++];