2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2003 by Eric Biederman
5 * Copyright (C) Stefan Reinauer
6 * Copyright (C) 2007 Advanced Micro Devices, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 /* Turn off machine check triggers when reading
23 * pci space where there are no devices.
24 * This is necessary when scaning the bus for
25 * devices which is done by the kernel
28 #include <console/console.h>
29 #include <device/device.h>
30 #include <device/pci.h>
31 #include <device/pci_ids.h>
32 #include <device/pci_ops.h>
33 #include <part/hard_reset.h>
34 #include <pc80/mc146818rtc.h>
36 #include <cpu/amd/model_10xxx_rev.h>
41 * @brief Read resources for AGP aperture
45 * There is only one AGP aperture resource needed. The resoruce is added to
46 * the northbridge of BSP.
48 * The same trick can be used to augment legacy VGA resources which can
49 * be detect by generic pci reousrce allocator for VGA devices.
50 * BAD: it is more tricky than I think, the resource allocation code is
51 * implemented in a way to NOT DOING legacy VGA resource allcation on
54 static void mcf3_read_resources(device_t dev)
56 struct resource *resource;
58 /* Read the generic PCI resources */
59 pci_dev_read_resources(dev);
61 /* If we are not the first processor don't allocate the gart apeture */
62 if (dev->path.u.pci.devfn != PCI_DEVFN(CDB, 3)) {
67 get_option(&iommu, "iommu");
70 /* Add a Gart apeture resource */
71 resource = new_resource(dev, 0x94);
72 resource->size = iommu?AGP_APERTURE_SIZE:1;
73 resource->align = log2(resource->size);
74 resource->gran = log2(resource->size);
75 resource->limit = 0xffffffff; /* 4G */
76 resource->flags = IORESOURCE_MEM;
80 static void set_agp_aperture(device_t dev)
82 struct resource *resource;
84 resource = probe_resource(dev, 0x94);
87 u32 gart_base, gart_acr;
89 /* Remember this resource has been stored */
90 resource->flags |= IORESOURCE_STORED;
92 /* Find the size of the GART aperture */
93 gart_acr = (0<<6)|(0<<5)|(0<<4)|((resource->gran - 25) << 1)|(0<<0);
95 /* Get the base address */
96 gart_base = ((resource->base) >> 25) & 0x00007fff;
98 /* Update the other northbriges */
100 while((pdev = dev_find_device(PCI_VENDOR_ID_AMD, 0x1203, pdev))) {
101 /* Store the GART size but don't enable it */
102 pci_write_config32(pdev, 0x90, gart_acr);
104 /* Store the GART base address */
105 pci_write_config32(pdev, 0x94, gart_base);
107 /* Don't set the GART Table base address */
108 pci_write_config32(pdev, 0x98, 0);
110 /* Report the resource has been stored... */
111 report_resource_stored(pdev, resource, " <gart>");
116 static void mcf3_set_resources(device_t dev)
118 /* Set the gart apeture */
119 set_agp_aperture(dev);
121 /* Set the generic PCI resources */
122 pci_dev_set_resources(dev);
125 static void misc_control_init(struct device *dev)
129 printk_debug("NB: Function 3 Misc Control.. ");
131 /* Disable Machine checks from Invalid Locations.
132 * This is needed for PC backwards compatibility.
134 cmd = pci_read_config32(dev, 0x44);
135 cmd |= (1<<6) | (1<<25);
136 pci_write_config32(dev, 0x44, cmd );
138 printk_debug("done.\n");
142 static struct device_operations mcf3_ops = {
143 .read_resources = mcf3_read_resources,
144 .set_resources = mcf3_set_resources,
145 .enable_resources = pci_dev_enable_resources,
146 .init = misc_control_init,
151 static struct pci_driver mcf3_driver __pci_driver = {
153 .vendor = PCI_VENDOR_ID_AMD,