2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
21 #include <device/pci.h>
22 #include <device/pci_ids.h>
26 #include <cpu/amd/amdfam10_sysconf.h>
30 * pci1234[0] will record sblink and bus range
31 * pci1234[i] will record ht chain i.
32 * It will keep the sequence when some ht io card is not installed.
48 * Total: xxx: I just want to use 32 instead, If you have more, you may need to
49 * reset HC_POSSIBLE_NUM and update ssdt.dsl (hcdn, hclk)
51 * Put all the possible ht node/link to the list tp pci1234[] in get_bus_conf.c
52 * on MB dir. Also, don't forget to increase the CONFIG_ACPI_SSDTX_NUM etc if you have
53 * too much SSDT. How about co-processor on socket 1 on 2 way system.
54 * or socket 2, and socket3 on 4 way system? treat that as one hc too!
58 #include "northbridge.h"
60 void get_pci1234(void)
66 dword = sysconf.sblk<<8;
68 sysconf.pci1234[0] = dword; // sblink
71 /* about hardcode numbering for HT_IO support
72 set the node_id and link_id that could have ht chain in the one array,
73 then check if is enabled.... then update final value
76 //here we need to set hcdn
77 //1. hypertransport.c need to record hcdn_reg together with 0xe0, 0xe4, 0xe8, 0xec when are set
78 //2. so at the same time we need update hsdn with hcdn_reg here
79 // printk(BIOS_DEBUG, "sysconf.ht_c_num = %02d\n", sysconf.ht_c_num);
81 for(j=0;j<sysconf.ht_c_num;j++) {
83 dwordx = sysconf.ht_c_conf_bus[j];
84 // printk(BIOS_DEBUG, "sysconf.ht_c_conf_bus[%02d] = %08x\n", j, sysconf.ht_c_conf_bus[j]);
85 dwordx &=0xfffffffd; //keep bus num, node_id, link_num, enable bits
86 if((dwordx & 0x7fd) == dword) { //SBLINK
87 sysconf.pci1234[0] = dwordx;
88 sysconf.hcdn[0] = sysconf.hcdn_reg[j];
92 // We need to find out the number of HC
94 for(i=1;i<sysconf.hc_possible_num;i++) {
95 if((dwordx & 0x7fc) == (sysconf.pci1234[i] & 0x7fc)) { // same node and same linkn
96 sysconf.pci1234[i] = dwordx;
97 sysconf.hcdn[i] = sysconf.hcdn_reg[j];
101 // for 0xffc match or same node
102 for(i=1;i<sysconf.hc_possible_num;i++) {
103 if((dwordx & 0x7fc) == (dwordx & sysconf.pci1234[i] & 0x7fc)) {
104 sysconf.pci1234[i] = dwordx;
105 sysconf.hcdn[i] = sysconf.hcdn_reg[j];
112 for(i=1;i<sysconf.hc_possible_num;i++) {
113 if(!(sysconf.pci1234[i] & 1)) {
114 sysconf.pci1234[i] = 0;
115 sysconf.hcdn[i] = 0x20202020;