src/northbridge/amd/amdfam10/debug.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 /*
  21  * Generic FAM10 debug code, used by mainboard specific romstage.c
  22  */
  23
  24 #include "amdfam10_pci.c"
  25
  26 static inline void print_debug_addr(const char *str, void *val)
  27 {
  28 #if CACHE_AS_RAM_ADDRESS_DEBUG == 1
  29                 printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val);
  30 #endif
  31 }
  32
  33 static void print_debug_pci_dev(u32 dev)
  34 {
  35 #if CONFIG_PCI_BUS_SEGN_BITS==0
  36         printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
  37 #else
  38         printk(BIOS_DEBUG, "PCI: %04x:%02x:%02x.%02x", (dev>>28) & 0x0f, (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
  39 #endif
  40 }
  41
  42 static inline void print_pci_devices(void)
  43 {
  44         device_t dev;
  45         for(dev = PCI_DEV(0, 0, 0);
  46                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
  47                 dev += PCI_DEV(0,0,1)) {
  48                 u32 id;
  49                 id = pci_read_config32(dev, PCI_VENDOR_ID);
  50                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
  51                         (((id >> 16) & 0xffff) == 0xffff) ||
  52                         (((id >> 16) & 0xffff) == 0x0000)) {
  53                         continue;
  54                 }
  55                 print_debug_pci_dev(dev);
  56                 printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16));
  57                 if(((dev>>12) & 0x07) == 0) {
  58                         u8 hdr_type;
  59                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
  60                         if((hdr_type & 0x80) != 0x80) {
  61                                 dev += PCI_DEV(0,0,7);
  62                         }
  63                 }
  64         }
  65 }
  66
  67 static inline void print_pci_devices_on_bus(u32 busn)
  68 {
  69         device_t dev;
  70         for(dev = PCI_DEV(busn, 0, 0);
  71                 dev <= PCI_DEV(busn, 0x1f, 0x7);
  72                 dev += PCI_DEV(0,0,1)) {
  73                 u32 id;
  74                 id = pci_read_config32(dev, PCI_VENDOR_ID);
  75                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
  76                    (((id >> 16) & 0xffff) == 0xffff) ||
  77                    (((id >> 16) & 0xffff) == 0x0000)) {
  78                         continue;
  79                 }
  80                 print_debug_pci_dev(dev);
  81                 printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16));
  82                 if(((dev>>12) & 0x07) == 0) {
  83                         u8 hdr_type;
  84                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
  85                         if((hdr_type & 0x80) != 0x80) {
  86                                  dev += PCI_DEV(0,0,7);
  87                         }
  88                 }
  89         }
  90 }
  91
  92
  93
  94 static void dump_pci_device_range(u32 dev, u32 start_reg, u32 size)
  95 {
  96         int i;
  97         print_debug_pci_dev(dev);
  98         int j;
  99         int end = start_reg + size;
 100
 101         for(i = start_reg; i < end; i+=4) {
 102                 u32 val;
 103                 if ((i & 0x0f) == 0) {
 104                         printk(BIOS_DEBUG, "\n%04x:",i);
 105                 }
 106                 val = pci_read_config32(dev, i);
 107                 for(j=0;j<4;j++) {
 108                         printk(BIOS_DEBUG, " %02x", val & 0xff);
 109                         val >>= 8;
 110                 }
 111         }
 112         print_debug("\n");
 113 }
 114 static void dump_pci_device(u32 dev)
 115 {
 116         dump_pci_device_range(dev, 0, 4096);
 117 }
 118 static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start,
 119                                         u32 size)
 120 {
 121         int i;
 122         int end = start + size;
 123         print_debug_pci_dev(dev);
 124         print_debug(" -- index_reg="); print_debug_hex32(index_reg);
 125
 126         for(i = start; i < end; i++) {
 127                 u32 val;
 128                 int j;
 129                 printk(BIOS_DEBUG, "\n%02x:",i);
 130                 val = pci_read_config32_index_wait(dev, index_reg, i);
 131                 for(j=0;j<4;j++) {
 132                         printk(BIOS_DEBUG, " %02x", val & 0xff);
 133                         val >>= 8;
 134                 }
 135
 136         }
 137         print_debug("\n");
 138 }
 139 static inline void dump_pci_device_index_wait(u32 dev, u32 index_reg)
 140 {
 141         dump_pci_device_index_wait_range(dev, index_reg, 0, 0x54);
 142         dump_pci_device_index_wait_range(dev, index_reg, 0x100, 0x08); //DIMM1 when memclk > 400Hz
 143 //      dump_pci_device_index_wait_range(dev, index_reg, 0x200, 0x08); //DIMM2
 144 //      dump_pci_device_index_wait_range(dev, index_reg, 0x300, 0x08); //DIMM3
 145
 146 }
 147
 148 static inline void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length)
 149 {
 150         int i;
 151         print_debug_pci_dev(dev);
 152
 153         print_debug(" index reg: "); print_debug_hex16(index_reg); print_debug(" type: "); print_debug_hex8(type);
 154
 155         type<<=28;
 156
 157         for(i = 0; i < length; i++) {
 158                 u32 val;
 159                 if ((i & 0x0f) == 0) {
 160                         printk(BIOS_DEBUG, "\n%02x:",i);
 161                 }
 162                 val = pci_read_config32_index(dev, index_reg, i|type);
 163                 printk(BIOS_DEBUG, " %08x", val);
 164         }
 165         print_debug("\n");
 166 }
 167
 168
 169 static inline void dump_pci_devices(void)
 170 {
 171         device_t dev;
 172         for(dev = PCI_DEV(0, 0, 0);
 173                 dev <= PCI_DEV(0xff, 0x1f, 0x7);
 174                 dev += PCI_DEV(0,0,1)) {
 175                 u32 id;
 176                 id = pci_read_config32(dev, PCI_VENDOR_ID);
 177                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
 178                         (((id >> 16) & 0xffff) == 0xffff) ||
 179                         (((id >> 16) & 0xffff) == 0x0000)) {
 180                         continue;
 181                 }
 182                 dump_pci_device(dev);
 183
 184                 if(((dev>>12) & 0x07) == 0) {
 185                         u8 hdr_type;
 186                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 187                         if((hdr_type & 0x80) != 0x80) {
 188                                 dev += PCI_DEV(0,0,7);
 189                         }
 190                 }
 191         }
 192 }
 193
 194
 195 static inline void dump_pci_devices_on_bus(u32 busn)
 196 {
 197         device_t dev;
 198         for(dev = PCI_DEV(busn, 0, 0);
 199                 dev <= PCI_DEV(busn, 0x1f, 0x7);
 200                 dev += PCI_DEV(0,0,1)) {
 201                 u32 id;
 202                 id = pci_read_config32(dev, PCI_VENDOR_ID);
 203                 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
 204                    (((id >> 16) & 0xffff) == 0xffff) ||
 205                    (((id >> 16) & 0xffff) == 0x0000)) {
 206                         continue;
 207                 }
 208                 dump_pci_device(dev);
 209
 210                 if(((dev>>12) & 0x07) == 0) {
 211                         u8 hdr_type;
 212                         hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
 213                         if((hdr_type & 0x80) != 0x80) {
 214                                 dev += PCI_DEV(0,0,7);
 215                         }
 216                 }
 217         }
 218 }
 219
 220 #if CONFIG_DEBUG_SMBUS
 221
 222 static void dump_spd_registers(const struct mem_controller *ctrl)
 223 {
 224         int i;
 225         print_debug("\n");
 226         for(i = 0; i < DIMM_SOCKETS; i++) {
 227                 u32 device;
 228                 device = ctrl->spd_addr[i];
 229                 if (device) {
 230                         int j;
 231                         printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
 232                         for(j = 0; j < 128; j++) {
 233                                 int status;
 234                                 u8 byte;
 235                                 if ((j & 0xf) == 0) {
 236                                         printk(BIOS_DEBUG, "\n%02x: ", j);
 237                                 }
 238                                 status = smbus_read_byte(device, j);
 239                                 if (status < 0) {
 240                                         break;
 241                                 }
 242                                 byte = status & 0xff;
 243                                 printk(BIOS_DEBUG, "%02x ", byte);
 244                         }
 245                         print_debug("\n");
 246                 }
 247                 device = ctrl->spd_addr[i+DIMM_SOCKETS];
 248                 if (device) {
 249                         int j;
 250                         printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
 251                         for(j = 0; j < 128; j++) {
 252                                 int status;
 253                                 u8 byte;
 254                                 if ((j & 0xf) == 0) {
 255                                         printk(BIOS_DEBUG, "\n%02x: ", j);
 256                                 }
 257                                 status = smbus_read_byte(device, j);
 258                                 if (status < 0) {
 259                                         break;
 260                                 }
 261                                 byte = status & 0xff;
 262                                 printk(BIOS_DEBUG, "%02x ", byte);
 263                         }
 264                         print_debug("\n");
 265                 }
 266         }
 267 }
 268 static void dump_smbus_registers(void)
 269 {
 270         u32 device;
 271         print_debug("\n");
 272         for(device = 1; device < 0x80; device++) {
 273                 int j;
 274                 if( smbus_read_byte(device, 0) < 0 ) continue;
 275                 printk(BIOS_DEBUG, "smbus: %02x", device);
 276                 for(j = 0; j < 256; j++) {
 277                         int status;
 278                         u8 byte;
 279                         status = smbus_read_byte(device, j);
 280                         if (status < 0) {
 281                                 break;
 282                         }
 283                         if ((j & 0xf) == 0) {
 284                                 printk(BIOS_DEBUG, "\n%02x: ",j);
 285                         }
 286                         byte = status & 0xff;
 287                         printk(BIOS_DEBUG, "%02x ", byte);
 288                 }
 289                 print_debug("\n");
 290         }
 291 }
 292 #endif
 293 static inline void dump_io_resources(u32 port)
 294 {
 295
 296         int i;
 297         udelay(2000);
 298         printk(BIOS_DEBUG, "%04x:\n", port);
 299         for(i=0;i<256;i++) {
 300                 u8 val;
 301                 if ((i & 0x0f) == 0) {
 302                         printk(BIOS_DEBUG, "%02x:", i);
 303                 }
 304                 val = inb(port);
 305                 printk(BIOS_DEBUG, " %02x",val);
 306                 if ((i & 0x0f) == 0x0f) {
 307                         print_debug("\n");
 308                 }
 309                 port++;
 310         }
 311 }
 312
 313 static inline void dump_mem(u32 start, u32 end)
 314 {
 315         u32 i;
 316         print_debug("dump_mem:");
 317         for(i=start;i<end;i++) {
 318                 if((i & 0xf)==0) {
 319                         printk(BIOS_DEBUG, "\n%08x:", i);
 320                 }
 321                 printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i));
 322         }
 323         print_debug("\n");
 324 }