src/northbridge/amd/amdfam10/amdfam10_acpi.c

   1 /*
   2  * This file is part of the LinuxBIOS project.
   3  *
   4  * Copyright (C) 2007 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <console/console.h>
  21 #include <string.h>
  22 #include <arch/acpi.h>
  23 #include <device/pci.h>
  24 #include <cpu/x86/msr.h>
  25 #include <cpu/amd/mtrr.h>
  26 #include <cpu/amd/amdfam10_sysconf.h>
  27 #include "amdfam10.h"
  28
  29 //it seems some functions can be moved arch/i386/boot/acpi.c
  30
  31 unsigned long acpi_create_madt_lapics(unsigned long current)
  32 {
  33         device_t cpu;
  34         int cpu_index = 0;
  35
  36         for(cpu = all_devices; cpu; cpu = cpu->next) {
  37                 if ((cpu->path.type != DEVICE_PATH_APIC) ||
  38                    (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
  39                         continue;
  40                 }
  41                 if (!cpu->enabled) {
  42                         continue;
  43                 }
  44                 current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, cpu_index, cpu->path.u.apic.apic_id);
  45                 cpu_index++;
  46         }
  47         return current;
  48 }
  49
  50 unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 lint)
  51 {
  52         device_t cpu;
  53         int cpu_index = 0;
  54
  55         for(cpu = all_devices; cpu; cpu = cpu->next) {
  56                 if ((cpu->path.type != DEVICE_PATH_APIC) ||
  57                    (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
  58                         continue;
  59                 }
  60                 if (!cpu->enabled) {
  61                         continue;
  62                 }
  63                 current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, cpu_index, flags, lint);
  64                 cpu_index++;
  65         }
  66         return current;
  67 }
  68
  69
  70 unsigned long acpi_create_srat_lapics(unsigned long current)
  71 {
  72         device_t cpu;
  73         int cpu_index = 0;
  74
  75         for(cpu = all_devices; cpu; cpu = cpu->next) {
  76                 if ((cpu->path.type != DEVICE_PATH_APIC) ||
  77                    (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
  78                         continue;
  79                 }
  80                 if (!cpu->enabled) {
  81                         continue;
  82                 }
  83                 printk_debug("SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.u.apic.node_id, cpu->path.u.apic.apic_id);
  84                 current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.u.apic.node_id, cpu->path.u.apic.apic_id);
  85                 cpu_index++;
  86         }
  87         return current;
  88 }
  89
  90 static unsigned long resk(uint64_t value)
  91 {
  92         unsigned long resultk;
  93         if (value < (1ULL << 42)) {
  94                 resultk = value >> 10;
  95         } else {
  96                 resultk = 0xffffffff;
  97         }
  98         return resultk;
  99 }
 100
 101
 102 struct acpi_srat_mem_state {
 103         unsigned long current;
 104 };
 105
 106 void set_srat_mem(void *gp, struct device *dev, struct resource *res)
 107 {
 108         struct acpi_srat_mem_state *state = gp;
 109         unsigned long basek, sizek;
 110         basek = resk(res->base);
 111         sizek = resk(res->size);
 112
 113         printk_debug("set_srat_mem: dev %s, res->index=%04x startk=%08x, sizek=%08x\n",
 114                         dev_path(dev), res->index, basek, sizek);
 115         /*
 116          0-640K must be on node 0
 117          next range is from 1M---
 118          So will cut off before 1M in the mem range
 119         */
 120         if((basek+sizek)<1024) return;
 121
 122         if(basek<1024) {
 123                 sizek -= 1024 - basek;
 124                 basek = 1024;
 125         }
 126
 127         // need to figure out NV
 128         state->current += acpi_create_srat_mem((acpi_srat_mem_t *)state->current, (res->index & 0xf), basek, sizek, 1);
 129 }
 130
 131
 132 unsigned long acpi_fill_srat(unsigned long current)
 133 {
 134         struct acpi_srat_mem_state srat_mem_state;
 135
 136         /* create all subtables for processors */
 137         current = acpi_create_srat_lapics(current);
 138
 139         /* create all subteble for memory range */
 140
 141         /* 0-640K must be on node 0 */
 142         current += acpi_create_srat_mem((acpi_srat_mem_t *)current, 0, 0, 640, 1);//enable
 143
 144         srat_mem_state.current = current;
 145         search_global_resources(
 146                 IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
 147                 set_srat_mem, &srat_mem_state);
 148
 149         current = srat_mem_state.current;
 150         return current;
 151 }
 152
 153 unsigned long acpi_fill_slit(unsigned long current)
 154 {
 155         /* need to find out the node num at first */
 156         /* fill the first 8 byte with that num */
 157         /* fill the next num*num byte with distance, local is 10, 1 hop mean 20, and 2 hop with 30.... */
 158
 159         struct sys_info *sysinfox = (struct sys_info *)((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_GLOBAL_VAR_SIZE);
 160         u8 *ln = sysinfox->ln;
 161
 162
 163         u8 *p = (u8 *)current;
 164         int nodes = sysconf.nodes;
 165         int i,j;
 166         u32 hops;
 167
 168         memset(p, 0, 8+nodes*nodes);
 169         *p = (u8) nodes;
 170         p += 8;
 171
 172         for(i=0;i<nodes;i++) {
 173                 for(j=0;j<nodes; j++) {
 174                         if(i==j) {
 175                                 p[i*nodes+j] = 10;
 176                         } else {
 177                                 hops = (((ln[i*NODE_NUMS+j]>>4) & 0x7)+1);
 178                                 p[i*nodes+j] = hops * 2 + 10;
 179                         }
 180                 }
 181         }
 182
 183         current += 8+nodes*nodes;
 184         return current;
 185 }
 186
 187
 188 // moved from mb acpi_tables.c
 189 static void intx_to_stream(u32 val, u32 len, u8 *dest)
 190 {
 191         int i;
 192         for(i=0;i<len;i++) {
 193                 *(dest+i) = (val >> (8*i)) & 0xff;
 194         }
 195 }
 196
 197
 198 static void int_to_stream(u32 val, u8 *dest)
 199 {
 200         return intx_to_stream(val, 4, dest);
 201 }
 202
 203
 204 // used by acpi_tables.h
 205 void update_ssdt(void *ssdt)
 206 {
 207         u8 *BUSN;
 208         u8 *MMIO;
 209         u8 *PCIO;
 210         u8 *SBLK;
 211         u8 *TOM1;
 212         u8 *SBDN;
 213         u8 *HCLK;
 214         u8 *HCDN;
 215         u8 *CBST;
 216         u8 *CBBX;
 217         u8 *CBS2;
 218         u8 *CBB2;
 219
 220
 221         int i;
 222         u32 dword;
 223         msr_t msr;
 224
 225         // the offset could be different if have different HC_NUMS, and HC_POSSIBLE_NUM and ssdt.asl
 226         BUSN = ssdt+0x3b; //+5 will be next BUSN
 227         MMIO = ssdt+0xe4; //+5 will be next MMIO
 228         PCIO = ssdt+0x36d; //+5 will be next PCIO
 229         SBLK = ssdt+0x4b2; // one byte
 230         TOM1 = ssdt+0x4b9; //
 231         SBDN = ssdt+0x4c3;//
 232         HCLK = ssdt+0x4d1; //+5 will be next HCLK
 233         HCDN = ssdt+0x57a; //+5 will be next HCDN
 234         CBBX = ssdt+0x61f; //
 235         CBST = ssdt+0x626;
 236         CBB2 = ssdt+0x62d; //
 237         CBS2 = ssdt+0x634;
 238
 239         for(i=0;i<HC_NUMS;i++) {
 240                 dword = sysconf.ht_c_conf_bus[i];
 241                 int_to_stream(dword, BUSN+i*5);
 242         }
 243
 244         for(i=0;i<(HC_NUMS*2);i++) { // FIXME: change to more chain
 245                 dword = sysconf.conf_mmio_addrx[i]; //base
 246                 int_to_stream(dword, MMIO+(i*2)*5);
 247                 dword = sysconf.conf_mmio_addr[i]; //mask
 248                 int_to_stream(dword, MMIO+(i*2+1)*5);
 249         }
 250         for(i=0;i<HC_NUMS;i++) { // FIXME: change to more chain
 251                 dword = sysconf.conf_io_addrx[i];
 252                 int_to_stream(dword, PCIO+(i*2)*5);
 253                 dword = sysconf.conf_io_addr[i];
 254                 int_to_stream(dword, PCIO+(i*2+1)*5);
 255         }
 256
 257         *SBLK = (u8)(sysconf.sblk);
 258
 259         msr = rdmsr(TOP_MEM);
 260         int_to_stream(msr.lo, TOM1);
 261
 262         int_to_stream(sysconf.sbdn, SBDN);
 263
 264         for(i=0;i<sysconf.hc_possible_num;i++) {
 265                 int_to_stream(sysconf.pci1234[i], HCLK + i*5);
 266                 int_to_stream(sysconf.hcdn[i],     HCDN + i*5);
 267         }
 268         for(i=sysconf.hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
 269                 int_to_stream(0x00000000, HCLK + i*5);
 270                 int_to_stream(0x20202020, HCDN + i*5);
 271         }
 272
 273         *CBBX = (u8)(CBB);
 274
 275         if(CBB == 0xff) {
 276                 *CBST = (u8) (0x0f);
 277         } else {
 278                 if((sysconf.pci1234[0] >> 12) & 0xff) { //sb chain on  other than bus 0
 279                         *CBST = (u8) (0x0f);
 280                 }
 281                 else {
 282                         *CBST = (u8) (0x00);
 283                 }
 284         }
 285
 286         if((CBB == 0xff) && (sysconf.nodes>32)) {
 287                  *CBS2 = 0x0f;
 288                  *CBB2 = (u8)(CBB-1);
 289         } else {
 290                 *CBS2 = 0x00;
 291                 *CBB2 = 0x00;
 292         }
 293
 294 }
 295
 296
 297 void update_sspr(void *sspr, u32 nodeid, u32 cpuindex)
 298 {
 299         u8 *CPU;
 300         u8 *CPUIN;
 301         u8 *COREFREQ;
 302         u8 *POWER;
 303         u8 *TRANSITION_LAT;
 304         u8 *BUSMASTER_LAT;
 305         u8 *CONTROL;
 306         u8 *STATUS;
 307         unsigned offset = 0x94 - 0x7f;
 308         int i;
 309
 310         CPU = sspr + 0x38;
 311         CPUIN = sspr + 0x3a;
 312
 313         COREFREQ = sspr + 0x7f; //2 byte
 314         POWER = sspr + 0x82; //3 bytes
 315         TRANSITION_LAT = sspr + 0x87; //two bytes
 316         BUSMASTER_LAT = sspr + 0x8a; //two bytes
 317         CONTROL = sspr + 0x8d;
 318         STATUS = sspr + 0x8f;
 319
 320         sprintf(CPU, "%02x", (u8)cpuindex);
 321         *CPUIN = (u8) cpuindex;
 322
 323         for(i=0;i<sysconf.p_state_num;i++) {
 324                 struct p_state_t *p_state = &sysconf.p_state[nodeid * 5 + i];
 325                 intx_to_stream(COREFREQ + i*offset, 2, p_state->corefreq);
 326                 intx_to_stream(POWER + i*offset, 3, p_state->power);
 327                 intx_to_stream(TRANSITION_LAT + i*offset, 2, p_state->transition_lat);
 328                 intx_to_stream(BUSMASTER_LAT + i*offset, 2, p_state->busmaster_lat);
 329                 *((u8 *)(CONTROL + i*offset)) =(u8) p_state->control;
 330                 *((u8 *)(STATUS + i*offset)) =(u8) p_state->status;
 331         }
 332 }
 333
 334 extern unsigned char AmlCode_sspr5[];
 335 extern unsigned char AmlCode_sspr4[];
 336 extern unsigned char AmlCode_sspr3[];
 337 extern unsigned char AmlCode_sspr2[];
 338 extern unsigned char AmlCode_sspr1[];
 339
 340 /* fixme: find one good way for different p_state_num */
 341 unsigned long acpi_add_ssdt_pstates(acpi_rsdt_t *rsdt, unsigned long current)
 342 {
 343         device_t cpu;
 344         int cpu_index = 0;
 345
 346         acpi_header_t *ssdt;
 347
 348         if(!sysconf.p_state_num) return current;
 349
 350         u8 *AmlCode_sspr;
 351         switch(sysconf.p_state_num) {
 352                 case 1: AmlCode_sspr = AmlCode_sspr1; break;
 353                 case 2: AmlCode_sspr = AmlCode_sspr2; break;
 354                 case 3: AmlCode_sspr = AmlCode_sspr3; break;
 355                 case 4: AmlCode_sspr = AmlCode_sspr4; break;
 356                 default: AmlCode_sspr = AmlCode_sspr5; break;
 357         }
 358
 359         for(cpu = all_devices; cpu; cpu = cpu->next) {
 360                 if ((cpu->path.type != DEVICE_PATH_APIC) ||
 361                    (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
 362                         continue;
 363                 }
 364                 if (!cpu->enabled) {
 365                          continue;
 366                 }
 367                 printk_debug("ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.u.apic.node_id, cpu->path.u.apic.core_id);
 368
 369                 current   = ( current + 0x0f) & -0x10;
 370                 ssdt = (acpi_header_t *)current;
 371                 current += ((acpi_header_t *)AmlCode_sspr)->length;
 372                 memcpy((void *)ssdt, (void *)AmlCode_sspr, ((acpi_header_t *)AmlCode_sspr)->length);
 373                 update_sspr((void*)ssdt,cpu->path.u.apic.node_id, cpu_index);
 374                 /* recalculate checksum */
 375                 ssdt->checksum = 0;
 376                 ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
 377                 acpi_add_table(rsdt,ssdt);
 378
 379                 cpu_index++;
 380         }
 381         return current;
 382 }