src/mainboard/via/vt8454c/auto.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #define ASSEMBLY 1
  23 #define __PRE_RAM__
  24
  25 #include <stdint.h>
  26 #include <device/pci_def.h>
  27 #include <device/pci_ids.h>
  28 #include <arch/io.h>
  29 #include <device/pnp_def.h>
  30 #include <arch/romcc_io.h>
  31 #include <arch/hlt.h>
  32 #include "pc80/serial.c"
  33 #include "arch/i386/lib/console.c"
  34 #include "lib/ramtest.c"
  35 #include "northbridge/via/cx700/raminit.h"
  36 #include "cpu/x86/mtrr/earlymtrr.c"
  37 #include "cpu/x86/bist.h"
  38
  39 #define DEACTIVATE_CAR 1
  40 #define DEACTIVATE_CAR_FILE "cpu/via/car/cache_as_ram_post.c"
  41 #include "cpu/x86/car/copy_and_run.c"
  42 #include "pc80/udelay_io.c"
  43 #include "lib/delay.c"
  44 #include "cpu/x86/lapic/boot_cpu.c"
  45 #include "northbridge/via/cx700/cx700_early_smbus.c"
  46 #include "debug.c"
  47
  48 #include "northbridge/via/cx700/cx700_early_serial.c"
  49 #include "northbridge/via/cx700/raminit.c"
  50
  51 static void enable_mainboard_devices(void)
  52 {
  53         device_t dev;
  54
  55         dev = pci_locate_device(PCI_ID(0x1106, 0x8324), 0);
  56         if (dev == PCI_DEV_INVALID) {
  57                 die("LPC bridge not found!!!\n");
  58         }
  59         // Disable GP3
  60         pci_write_config8(dev, 0x98, 0x00);
  61
  62         // Disable mc97
  63         pci_write_config8(dev, 0x50, 0x80);
  64
  65         // Disable internal KBC Configuration
  66         pci_write_config8(dev, 0x51, 0x2d);
  67         pci_write_config8(dev, 0x58, 0x42);
  68         pci_write_config8(dev, 0x59, 0x80);
  69         pci_write_config8(dev, 0x5b, 0x01);
  70
  71         // Enable P2P Bridge Header for External PCI BUS.
  72         dev = pci_locate_device(PCI_ID(0x1106, 0x324e), 0);
  73         if (dev == PCI_DEV_INVALID) {
  74                 die("P2P bridge not found!!!\n");
  75         }
  76         pci_write_config8(dev, 0x4f, 0x41);
  77
  78         // Switch SATA to non-RAID mode
  79         dev = pci_locate_device(PCI_ID(0x1106, 0x0581), 0);
  80         if (dev != PCI_DEV_INVALID) {
  81                 pci_write_config16(dev, 0xBA, 0x5324);
  82         }
  83 }
  84
  85 static void enable_shadow_ram(const struct mem_controller *ctrl)
  86 {
  87         u8 shadowreg;
  88
  89         pci_write_config8(PCI_DEV(0, 0, 3), 0x80, 0x2a);
  90
  91         /* 0xf0000-0xfffff - ACPI tables */
  92         shadowreg = pci_read_config8(PCI_DEV(0, 0, 3), 0x83);
  93         shadowreg |= 0x30;
  94         pci_write_config8(PCI_DEV(0, 0, 3), 0x83, shadowreg);
  95 }
  96
  97 static void main(unsigned long bist)
  98 {
  99         /* Set statically so it should work with cx700 as well */
 100         static const struct mem_controller cx700[] = {
 101                 {
 102                         .channel0 = {0x50, 0x51},
 103                 },
 104         };
 105
 106         enable_smbus();
 107
 108         enable_cx700_serial();
 109         uart_init();
 110         console_init();
 111
 112         /* Halt if there was a built in self test failure */
 113         report_bist_failure(bist);
 114
 115         enable_mainboard_devices();
 116
 117         /* Allows access to all northbridge devices */
 118         pci_write_config8(PCI_DEV(0, 0, 0), 0x4f, 0x01);
 119
 120         sdram_set_registers(cx700);
 121         enable_shadow_ram(cx700);
 122         sdram_enable(cx700);
 123
 124 #ifdef DEACTIVATE_CAR
 125         print_debug("Deactivating CAR");
 126 #include DEACTIVATE_CAR_FILE
 127         print_debug(" - Done.\r\n");
 128 #endif
 129         copy_and_run(0);
 130 }
 131
 132 void amd64_main(unsigned long bist) {
 133         main(bist);
 134 }