src/mainboard/via/vt8454c/auto.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007-2009 coresystems GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; version 2 of
   9  * the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  19  * MA 02110-1301 USA
  20  */
  21
  22 #define ASSEMBLY 1
  23
  24 #include <stdint.h>
  25 #include <device/pci_def.h>
  26 #include <device/pci_ids.h>
  27 #include <arch/io.h>
  28 #include <device/pnp_def.h>
  29 #include <arch/romcc_io.h>
  30 #include <arch/hlt.h>
  31 #include "pc80/serial.c"
  32 #include "arch/i386/lib/console.c"
  33 #include "lib/ramtest.c"
  34 #include "northbridge/via/cx700/raminit.h"
  35 #include "cpu/x86/mtrr/earlymtrr.c"
  36 #include "cpu/x86/bist.h"
  37
  38 #define CONFIG_DEACTIVATE_CAR 1
  39 #define CONFIG_DEACTIVATE_CAR_FILE "cpu/via/car/cache_as_ram_post.c"
  40 #include "cpu/x86/car/copy_and_run.c"
  41 #include "pc80/udelay_io.c"
  42 #include "lib/delay.c"
  43 #include "cpu/x86/lapic/boot_cpu.c"
  44 #include "northbridge/via/cx700/cx700_early_smbus.c"
  45 #include "debug.c"
  46
  47 #include "northbridge/via/cx700/cx700_early_serial.c"
  48 #include "northbridge/via/cx700/raminit.c"
  49
  50 static void enable_mainboard_devices(void)
  51 {
  52         device_t dev;
  53
  54         dev = pci_locate_device(PCI_ID(0x1106, 0x8324), 0);
  55         if (dev == PCI_DEV_INVALID) {
  56                 die("LPC bridge not found!!!\n");
  57         }
  58         // Disable GP3
  59         pci_write_config8(dev, 0x98, 0x00);
  60
  61         // Disable mc97
  62         pci_write_config8(dev, 0x50, 0x80);
  63
  64         // Disable internal KBC Configuration
  65         pci_write_config8(dev, 0x51, 0x2d);
  66         pci_write_config8(dev, 0x58, 0x42);
  67         pci_write_config8(dev, 0x59, 0x80);
  68         pci_write_config8(dev, 0x5b, 0x01);
  69
  70         // Enable P2P Bridge Header for External PCI BUS.
  71         dev = pci_locate_device(PCI_ID(0x1106, 0x324e), 0);
  72         if (dev == PCI_DEV_INVALID) {
  73                 die("P2P bridge not found!!!\n");
  74         }
  75         pci_write_config8(dev, 0x4f, 0x41);
  76
  77         // Switch SATA to non-RAID mode
  78         dev = pci_locate_device(PCI_ID(0x1106, 0x0581), 0);
  79         if (dev != PCI_DEV_INVALID) {
  80                 pci_write_config16(dev, 0xBA, 0x5324);
  81         }
  82 }
  83
  84 static void enable_shadow_ram(const struct mem_controller *ctrl)
  85 {
  86         u8 shadowreg;
  87
  88         pci_write_config8(PCI_DEV(0, 0, 3), 0x80, 0x2a);
  89
  90         /* 0xf0000-0xfffff - ACPI tables */
  91         shadowreg = pci_read_config8(PCI_DEV(0, 0, 3), 0x83);
  92         shadowreg |= 0x30;
  93         pci_write_config8(PCI_DEV(0, 0, 3), 0x83, shadowreg);
  94 }
  95
  96 static void main(unsigned long bist)
  97 {
  98         /* Set statically so it should work with cx700 as well */
  99         static const struct mem_controller cx700[] = {
 100                 {
 101                         .channel0 = {0x50, 0x51},
 102                 },
 103         };
 104
 105         enable_smbus();
 106
 107         enable_cx700_serial();
 108         uart_init();
 109         console_init();
 110
 111         /* Halt if there was a built in self test failure */
 112         report_bist_failure(bist);
 113
 114         enable_mainboard_devices();
 115
 116         /* Allows access to all northbridge devices */
 117         pci_write_config8(PCI_DEV(0, 0, 0), 0x4f, 0x01);
 118
 119         sdram_set_registers(cx700);
 120         enable_shadow_ram(cx700);
 121         sdram_enable(cx700);
 122
 123 #ifdef CONFIG_DEACTIVATE_CAR
 124         print_debug("Deactivating CAR");
 125 #include CONFIG_DEACTIVATE_CAR_FILE
 126         print_debug(" - Done.\r\n");
 127 #endif
 128         copy_and_run(0);
 129 }
 130
 131 void amd64_main(unsigned long bist) {
 132         main(bist);
 133 }