src/mainboard/via/epia-m/auto.c

   1 #define ASSEMBLY 1
   2
   3 #include <stdint.h>
   4 #include <device/pci_def.h>
   5 #include <device/pci_ids.h>
   6 #if 0
   7 #include <cpu/x86/lapic.h>
   8 #endif
   9 #include <arch/io.h>
  10 #include <device/pnp_def.h>
  11 #include <arch/romcc_io.h>
  12 #include <arch/hlt.h>
  13 #include "pc80/serial.c"
  14 #include "arch/i386/lib/console.c"
  15 #include "ram/ramtest.c"
  16 #include "northbridge/via/vt8623/raminit.h"
  17 #include "cpu/x86/mtrr/earlymtrr.c"
  18 #include "cpu/x86/bist.h"
  19
  20 /*
  21  */
  22 void udelay(int usecs)
  23 {
  24         int i;
  25         for(i = 0; i < usecs; i++)
  26                 outb(i&0xff, 0x80);
  27 }
  28
  29 #include "lib/delay.c"
  30 #include "cpu/x86/lapic/boot_cpu.c"
  31 #include "debug.c"
  32
  33 #include "southbridge/via/vt8235/vt8235_early_smbus.c"
  34
  35 #include "southbridge/via/vt8235/vt8235_early_serial.c"
  36 static void memreset_setup(void)
  37 {
  38 }
  39
  40 static inline int spd_read_byte(unsigned device, unsigned address)
  41 {
  42         return smbus_read_byte(device, address);
  43 }
  44
  45 #include "northbridge/via/vt8623/raminit.c"
  46
  47 static void enable_mainboard_devices(void)
  48 {
  49         device_t dev;
  50
  51         dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
  52                                 PCI_DEVICE_ID_VIA_8235), 0);
  53
  54         if (dev == PCI_DEV_INVALID) {
  55                 die("Southbridge not found!!!\n");
  56         }
  57         pci_write_config8(dev, 0x50, 0x80);
  58         pci_write_config8(dev, 0x51, 0x1f);
  59 #if 0
  60         // This early setup switches IDE into compatibility mode before PCI gets
  61         // a chance to assign I/Os
  62         // movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
  63         // //      movb    $0x09, %dl
  64         // movb    $0x00, %dl
  65         // PCI_WRITE_CONFIG_BYTE
  66 #endif
  67         /* we do this here as in V2, we can not yet do raw operations
  68          * to pci!
  69          */
  70         dev += 0x100; /* ICKY */
  71
  72         pci_write_config8(dev, 0x04, 7);
  73         pci_write_config8(dev, 0x40, 3);
  74         pci_write_config8(dev, 0x42, 0);
  75         pci_write_config8(dev, 0x3c, 0xe);
  76         pci_write_config8(dev, 0x3d, 0);
  77 }
  78
  79 static void enable_shadow_ram(void)
  80 {
  81         device_t dev = 0; /* no need to look up 0:0.0 */
  82         unsigned char shadowreg;
  83         /* dev 0 for southbridge */
  84         shadowreg = pci_read_config8(dev, 0x63);
  85         /* 0xf0000-0xfffff */
  86         shadowreg |= 0x30;
  87         pci_write_config8(dev, 0x63, shadowreg);
  88 }
  89
  90 static void main(unsigned long bist)
  91 {
  92         unsigned long x;
  93         device_t dev;
  94
  95         /*
  96          * Enable VGA; 32MB buffer.
  97          */
  98         pci_write_config8(0, 0xe1, 0xdd);
  99
 100         /*
 101          * Disable the firewire stuff, which apparently steps on IO 0+ on
 102          * reset. Doh!
 103          */
 104         dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
 105                                 PCI_DEVICE_ID_VIA_6305), 0);
 106         if (dev != PCI_DEV_INVALID) {
 107                 pci_write_config8(dev, 0x15, 0x1c);
 108         }
 109
 110         enable_smbus();
 111
 112         enable_vt8235_serial();
 113         uart_init();
 114         console_init();
 115
 116         print_spew("In auto.c:main()\r\n");
 117
 118         /* Halt if there was a built in self test failure */
 119         report_bist_failure(bist);
 120
 121         // init_timer();
 122
 123         outb(5, 0x80);
 124
 125         print_debug(" Enabling mainboard devices\r\n");
 126         enable_mainboard_devices();
 127
 128         print_debug(" Enabling shadow ram\r\n");
 129         enable_shadow_ram();
 130
 131         ddr_ram_setup((const struct mem_controller *)0);
 132
 133         /* Check all of memory */
 134 #if 0
 135         ram_check(0x00000000, msr.lo);
 136 #endif
 137 #if 0
 138         static const struct {
 139                 unsigned long lo, hi;
 140         } check_addrs[] = {
 141                 /* Check 16MB of memory @ 0*/
 142                 { 0x00000000, 0x01000000 },
 143 #if TOTAL_CPUS > 1
 144                 /* Check 16MB of memory @ 2GB */
 145                 { 0x80000000, 0x81000000 },
 146 #endif
 147         };
 148         int i;
 149         for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) {
 150                 ram_check(check_addrs[i].lo, check_addrs[i].hi);
 151         }
 152 #endif
 153
 154         if (bist == 0) {
 155                 print_debug(" Doing MTRR init.\r\n");
 156                 early_mtrr_init();
 157         }
 158
 159         //dump_pci_devices();
 160
 161         print_spew("Leaving auto.c:main()\r\n");
 162 }